PXR40RM Datasheet, PDF (1107/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

Command Queue 0 (CQueue0)
CQueue0 Write Command 0
0x0000
No Result
0x0004
CQueue0 Read Command 1
Result to RQueue0
0x0008
CQueue0 Conversion Command 2
Result to RQueue0
CQueue0 Conversion Command 3
0x000C
Result to RQueue1
...
...
0x001C
CQueue0 Conversion Command n
Result to RQueue0
Command Queue 1 (CQueue1)
0x0000
CQueue1 Read Command 0
Result to RQueue1
CQueue1 Read Command 1
0x0004
Result to RQueue1
CQueue1 Conversion Command 2
0x0008
Result to RQueue1
...
...
0x001C
CQueue1 Conversion Command m
Result to RQueue1
Enhanced Queued Analog-to-Digital Converter (EQADC)
Result Queue 0 (RQueue0)
0x0000
CQueue0 Read Command 1
Result
CQueue0 Conversion Command 2
0x0002
Result
...
...
RQueue0 is not aligned with CQueue0 because
the first command of CQueue0 does not request
results.
Result Queue 1 (RQueue1)
0x0000
CQueue1 Read Command 0
Result
0x0002
CQueue1 Read Command 1
Result
0x0004
CQueue0 Conversion Command 3
Result
CQueue1 Conversion Command 2
0x0006
Result
...
...
RQueue1 is not aligned with CQueue1 because
it contains results for CQueue0 and CQueue1
commands. The timing at which the CQueue0
command result is stored in RQueue1 depends
on the relative speed at which commands from
both CQueues are executed. This is influenced
by factors like resource sharing, ADC clock
frequency, sampling time, and triggering time.
Figure 27-76. EQADC Command and Result Queues
Freescale Semiconductor
PXR40 Microcontroller Reference Manual, Rev. 1
27-125