PXR40RM Datasheet, PDF (1285/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

External Bus Interface (EBI)
30.4.2.4.1 Single Beat Read Flow
The handshakes for a single beat read cycle are illustrated in the following flow and timing diagrams.
Master (EBI)
Slave
Asserts Transfer Start (D_TS)
Drives Address & Attributes
Asserts Transfer
Acknowledge (D_TA)
Receives Address
Drives Data
Yes
CS Access
& !SETA
?
No
Asserts Transfer
Acknowledge (D_TA)
Receives Data
Figure 30-9. Basic Flow Diagram of a Single Beat Read Cycle
D_CLKOUT
D_ADD[9:30]
D_RD_WR
D_BDIP
D_TS
D_ADD_DAT[0:31]
D_TA
CS[n]
D_ADD_DAT is valid
D_OE
Figure 30-10. Single Beat 32-bit Read Cycle, CS Access, Zero Wait States
Freescale Semiconductor
PXR40 Microcontroller Reference Manual, Rev. 1
30-23