PXR40RM Datasheet, PDF (1361/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

Nexus Development Interface (NDI)
• Upon direct/indirect branch after returning from a CPU low power state
• Upon direct/indirect branch after returning from debug mode
• Upon direct/indirect branch after occurrence of queue overrun (can be caused by any trace
message), provided program trace is enabled
• Upon direct/indirect branch after the periodic program trace counter has expired indicating 255
without-sync program trace messages have occurred since the last with-sync message occurred
• Upon direct/indirect branch after assertion of the event in (EVTI) pin if the EIC bits within the DC1
register have enabled this feature
• Upon direct/indirect branch after the sequential instruction counter has expired indicating 255
instructions have occurred between branches
• Upon direct/indirect branch after a BTM message was lost due to an attempted access to a secure
memory location.
• Upon direct/indirect branch after a BTM message was lost due to a collision entering the FIFO
between the BTM message and either a watchpoint message or an ownership trace message
If the NZ7C3 module is enabled at reset, a EVTI assertion initiates a program trace direct/indirect branch
with sync message (if program trace is enabled) upon the first direct/indirect branch. The format for
program trace direct/indirect branch with sync messages is as follows:
4
3
2
1
F-ADDR
I-CNT
SRC
TCODE (001011 or 001100)
msb 1–32 bits
1–8 bits
4 bits
6 bits
lsb
Max length = 50 bits; Min length = 12 bits
Figure 31-23. Direct/Indirect Branch with Sync Message Format
The formats for program trace direct/indirect branch with sync. messages and indirect branch history with
sync. messages are as follows:
5
4
3
2
1
HIST
F-ADDR
I-CNT
SRC
TCODE (011101)
msb 1–32 bits
1–32 bits
1–8 bits
4 bits
6 bits lsb
Max length = 82 bits; Min length = 13 bits
Figure 31-24. Indirect Branch History with Sync. Message Format
Exception conditions that result in program trace synchronization are summarized in Table 31-26.
Table 31-26. Program Trace Exception Summary
Exception Condition
Exception Handling
System Reset Negation
At the negation of JTAG reset (JCOMP), queue pointers, counters, state machines, and
registers within the NZ7C3 module are reset. Upon the first branch out of system reset
(if program trace is enabled), the first program trace message is a direct/indirect branch
with sync. message.
Freescale Semiconductor
PXR40 Microcontroller Reference Manual, Rev. 1
31-45