PXR40RM Datasheet, PDF (515/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

20.2 Signal Description
The PIT module has no external pins.
Periodic Interrupt Timer (PIT_RTI)
20.3 Memory Map and Register Description
This section provides a detailed description of all registers accessible in the PIT_RTI module.
20.3.1 Memory Map
Table 20-1 provides an overview off all PIT_RTI registers.
Table 20-1. PIT_RTI Memory Map
Base Address Offset
(Base = 0xC3FF0000
Register
0x000
0x004—0x0EC
0x0F4
0x0F8
0x0FC
0x100
0x104
0x108
0x10C
0x110
0x114
0x118
0x11C
0x120
0x124
0x128
0x12C
PIT_MCR—PIT Module Control Register
Reserved
PIT_RTI_CVAL—RTI current value register
PIT_RTI_TCTRL—RTI timer control register
PIT_RTI_TFLAG—RTI timer flag register
PIT_CH0_LDVAL—Channel 0 load value register
PIT_CH0_CVAL—Channel 0 current value
register
PIT_CH0_TCTRL—Channel 0 timer control
register
PIT_CH0_TFLAG—Channel 0 timer channel flag
register
PIT_CH1_LDVAL—Channel 1 load value register
PIT_CH1_CVAL—Channel 1 current value
register
PIT_CH1_TCTRL—Channel 1 timer control
register
PIT_CH1_TFLAG—Channel 1 timer channel flag
register
PIT_CH2_LDVAL—Channel 2 load value register
PIT_CH2_CVAL—Channel 2 current value
register
PIT_CH2_TCTRL—Channel 2 timer control
register
PIT_CH2_TFLAG—Channel 2 timer channel flag
register
Bits Access Reset Value Section/Page
32
R/W 0x0000_0000 20.3.2.1/4
32
R 0x0000_0000 20.3.2.3/5
32
R/W 0x0000_0000 20.3.2.4/5
32
R/W 0x0000_0000 20.3.2.5/6
32
R/W 0x0000_0000 20.3.2.2/5
32
R 0x0000_0000 20.3.2.3/5
32
R/W 0x0000_0000 20.3.2.4/5
32
R/W 0x0000_0000 20.3.2.5/6
32
R/W 0x0000_0000 20.3.2.2/5
32
R 0x0000_0000 20.3.2.3/5
32
R/W 0x0000_0000 20.3.2.4/5
32
R/W 0x0000_0000 20.3.2.5/6
32
R/W 0x0000_0000 20.3.2.2/5
32
R 0x0000_0000 20.3.2.3/5
32
R/W 0x0000_0000 20.3.2.4/5
32
R/W 0x0000_0000 20.3.2.5/6
Freescale Semiconductor
PXR40 Microcontroller Reference Manual, Rev. 1
20-3