PXR40RM Datasheet, PDF (374/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

Flash Memory Array and Control
12.2.2.9 Flash Bus Interface Access Protection Register (FLASH_BIUAPR)
This register is used to control bus master read and write access attributes to the flash array.
Offset: 0x0020
Access: User read/write
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R1
1
1
1
1
1
1
1
1
1
1
1
1
1
W
M8AP
Reset 1* 1* 1* 1* 1* 1* 1* 1* 1* 1* 1* 1* 1* 1* 1* 1*
R
W
Reset
16
17
18
19
20
21
22
23
24
25
26
27
28
29
1
1
M6AP
M5AP
M4AP
1
1
1
1
1
1
1* 1* 1* 1* 1* 1* 1* 1* 1* 1* 1* 1* 1* 1*
Figure 12-11. Flash Bus Interface Access Protection Register (FLASH_BIUAPR)
30
31
M0AP
1* 1*
Table 12-13. FLASH_BIUAPR Bit Field Descriptions
Field
0–1316–17
24–29
14–15
18–23
30–31
MnAP
Reserved
Description
Master n Access Protection, where n represents the master ID number in the table below. These fields are
used to control whether read and write accesses to the flash are allowed based on the master ID of a
requesting master.
00 No accesses may be performed by this master
01 Only read accesses may be performed by this master
10 Only write accesses may be performed by this master
11 Both read and write accesses may be performed by this master
Note: These bits refer to the master ID, not the master port number, as shown in the following:
Master ID
0
1
2
3
4
5
6
7
8
Module
Z7 Core
– reserved –
– reserved –
– reserved –
eDMA_A
eDMA_B
FlexRay
Reserved for EBI test
(not for customer use)
Z7 Nexus
12-22
PXR40 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor