PXR40RM Datasheet, PDF (379/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

Flash Memory Array and Control
12.2.2.12 User Test Register 1 (FLASH_x_UT1)
The User Test Register 1 (FLASH_x_UT1) provides added controllability to UTest.
Offset: 0x0040 / 0x4040
Access: User read/write
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
DAI
W
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
R
DAI
W
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 12-15. User Test Register 1 (FLASH_x_UT1)
Table 12-16. FLASH_x_UT1 Field Descriptions
Field
0–31
DAI
Description
Data Array Input. These bits enable checks of ECC logic by allowing data bits to be input into the ECC logic
and then read out by doing array reads or array integrity checks. The DAI[31:0] correspond to the 32 Array
bits representing Word 0 of the double word selected in the FLASH_x_AR.
12.2.2.13 User Test Register 2 (FLASH_x_UT2)
Offset: 0x0044 / 0x4044
Access: User read/write
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
DAI
W
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
R
DAI
W
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 12-16. User Test Register 2 (FLASH_x_UT2)
Table 12-17. FLASH_x_UT2 Field Descriptions
Field
0–31
DAI
Description
Data Array Input. These bits enable checks of ECC logic by allowing data bits to be input into the ECC logic
and then read out by doing array reads or array integrity checks. The DAI[63:32] correspond to the 32 Array
bits representing Word 1of the double word selected in the FLASH_x_AR.
Freescale Semiconductor
PXR40 Microcontroller Reference Manual, Rev. 1
12-27