PXR40RM Datasheet, PDF (873/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

Deserial Serial Peripheral Interface (DSPI)
only valid in conjunction with Master Mode. See Section 25.4.5, Combined Serial Interface (CSI)
Configuration, for more details.
In continuous clock mode, only t_DT is supported for TSB. However, in TSB non continuous clock mode,
both the PDT and DT delays are valid.
Address: DSPI_BASE + 0xC–DSPI_BASE + 0x28
0
1
R
DBR
W
Reset 0 1
2
3
FMSZ
11
4
5
6
7
8
9
CPO
L
CPHA
LSBFE
PCSSCK
10 0
0
00
10 11
PASC
00
Access: R/W
12 13 14 15
PDT
PBR
0000
16 17 18 19 20 21
22
23
24 25 26 27 28 29 30 31
R
CSSCK
W
ASC
DT
BR
Reset 0 0 0 0 0 0 0
0
0 0 0 00000
Figure 25-5. DSPI Clock and Transfer Attributes Register 0–7 (DSPI_CTAR0–DSPI_CTAR7)
Freescale Semiconductor
PXR40 Microcontroller Reference Manual, Rev. 1
25-13