PXR40RM Datasheet, PDF (1035/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

Enhanced Queued Analog-to-Digital Converter (EQADC)
ADC0/1 Register Address: 0x70–0x77
Access: User read/write
0
R0
W
Reset 0
1
2
3
4
0
0
CH_PULLx
0
0
0
0
5
6
7
8
0
0
PULL_STRx
0
0
0
0
9
10
11
12
13
14
15
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 27-41. ADC Pull Up/Down Control Register x (ADC_PUDCRx, x=0-7)
Table 27-31. ADC_PUDCRx Field Descriptions
Field
Description
0–1
Reserved
2–3
CH_PULLx
Channel x Pull Up/Down Control bits. The CH_PULLx[0:1] field controls the pull up/down configuration of
the channel x.
00 No Pull resistors connected to the channel
01 Pull Up resistor connected to the channel
10 Pull Down resistor connected to the channel
11 Pull Up and Pull Down resistors connected to the channel
4–5
Reserved
6–7
PULL_STRx
Pull Up/Down Strength Control bits of channel x. The PULL_STRx[0:1] bit field defines the strength of the
channel x pull up or down resistors.
00 Reserved
01 200 Kohm pull resistor
10 100 Kohm pull resistor
11 5 Kohm (approx.) pull resistor (not available for CH_PULL_x = 0b11)
8–15
Reserved
27.7 Functional Description
27.7.1 Overview
The EQADC provides a parallel interface to two on-chip ADCs and a parallel side interface to an on-chip
companion module, like a decimation filter. The two on-chip ADCs are architected to allow access to all
the analog channels.
Initially, command data is contained in system memory in a user defined data structure which is likely to
be a queue as depicted in Figure 27-2¹. Command data is moved between the CQueues and CFIFOs by the
host CPU or by the DMAC which respond to interrupt and DMA requests generated by the EQADC. The
EQADC supports software and hardware triggers from other blocks or external pins to initiate transfers of
commands from the multiple CFIFOs to the on-chip ADCs.
1. Command and result data can be stored in the system memory in any user defined data structure. However, in this
document it will be assumed that the data structure of choice is a queue, since it is the most likely data structure to be used
and because queues are the only type of data structure supported by the DMAC.
Freescale Semiconductor
PXR40 Microcontroller Reference Manual, Rev. 1
27-53