PXR40RM Datasheet, PDF (791/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

Enhanced Modular Input/Output Subsystem (eMIOS200)
23.4.1.1.16 Center-Aligned Output PWM Buffered with Dead Time (OPWMCB) Mode
The OPWMCB mode generates a center-aligned PWM with dead time insertion to the leading or trailing
edge. A1 and B1 registers are double-buffered to allow smooth output signal generation when changing
A2 or B2 registers values on the fly.
The BSL bits select the time base. The time base selected for a channel configured to OPWMCB mode
should be a channel configured to MCB Up/Down mode, as shown in Figure 23-35. It is recommended to
start the MCB channel time base after the OPWMCB mode is entered in order to avoid missing A matches
at the very first duty cycle.
Register A1 contains the ideal duty cycle for the PWM signal and is compared with the selected time base.
Register B1 contains the dead time value and is compared against the internal counter. For a leading edge
dead time insertion, the output PWM duty cycle is equal to the difference between register A1 and register
B1. For a trailing edge dead time insertion, the output PWM duty cycle is equal to the sum of register A1
and register B1. Mode[6] selects between trailing and leading dead time insertion.
NOTE
The internal counter runs in the internal prescaler ratio, while the selected
time base may be running in a different prescaler ratio.
When OPWMCB mode is entered (coming out of GPIO mode), the output flip-flop is set to the
complement of the EDPOL bit in the EMIOS_CCR[n] register.
The following basic steps summarize proper OPWMCB startup, assuming the channels are initially in
GPIO mode:
1. [global] Disable Global Prescaler.
2. [MCB channel] Disable Channel Prescaler.
3. [MCB channel] Write $1 at internal counter.
4. [MCB channel] Set A register.
5. [MCB channel] Set channel to MCB Up mode.
6. [MCB channel] Set prescaler ratio.
7. [MCB channel] Enable Channel Prescaler.
8. [OPWMCB channel] Disable Channel Prescaler.
9. [OPWMCB channel] Set A register.
10. [OPWMCB channel] Set B register.
11. [OPWMCB channel] Select time base input through BSL[1:0] bits.
12. [OPWMCB channel] Enter OPWMCB mode.
13. [OPWMCB channel] Set prescaler ratio.
14. [OPWMCB channel] Enable Channel Prescaler.
15. [global] Enable Global Prescaler.
Figure 23-47 shows the load of A1 and B1 registers, which occurs when the selected counter bus
transitions from 0x00_0002 to 0x00_0001. This event defines the cycle boundary. Values written to A2 or
Freescale Semiconductor
PXR40 Microcontroller Reference Manual, Rev. 1
23-51