PXR40RM Datasheet, PDF (1090/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

Enhanced Queued Analog-to-Digital Converter (EQADC)
The externally multiplexed channels are automatically selected by the CHANNEL_NUMBER field of a
Command Message, in the same way done with internally multiplexed channels. The software selects the
external multiplexed mode by setting the ADC0/1_EMUX bit in either ADC0_CR or ADC1_CR
depending on which ADC will perform the conversion. Table 27-43 shows the channel number
assignments for the multiplexed mode. There are 4 differential pairs, 39 single-ended, and, at most, 64
externally multiplexed channels which can be selected. Only one ADC can have its EMUX bit asserted at
a time.
Figure 27-67 shows the maximum configuration of eight external multiplexer chips connected to the
EQADC. The external multiplexer chip selects one of eight analog inputs and connects it to a single analog
output, which is fed to a specific input of the EQADC. The EQADC provides three multiplexed address
signals, MA0, MA1, and MA2, to select one of eight inputs. These three multiplexed address signals are
connected to all eight external multiplexer chips. The analog output of the eight multiplex chips are each
connected to eight separate EQADC inputs, ANR, ANS, ANT, ANU, ANW, ANX, ANY, and ANZ. The
MA pins correspond to the three least significant bits of the channel number that selects ANR, ANS, ANT,
ANU, ANW, ANX, ANY, and ANZ with MA0 being the most significant bit - See Table 27-43.
Table 27-43. Encoding of MA Pins¹
Channel Number selecting ANR, ANS, ANT, ANU, ANW, ANX, ANY, ANZ
(decimal)
ANR
ANS
ANT
ANU
ANW
ANX
224
232
240
248
64
72
225
233
241
249
65
73
226
234
242
250
66
74
227
235
243
251
67
75
228
236
244
252
68
76
229
237
245
253
69
77
230
238
246
254
70
78
231
239
247
255
71
79
NOTES:
1 _{‘0’ means pin is driven LOW and ‘1’ that pin is driven HIGH.}
ANY
80
81
82
83
84
85
86
87
ANZ
88
89
90
91
92
93
94
95
MA0
0
0
0
0
1
1
1
1
MA1
0
0
1
1
0
0
1
1
MA2
0
1
0
1
0
1
0
1
When the external multiplexed mode is selected for either ADC, the EQADC automatically creates the
MA output signals from CHANNEL_NUMBER field of a Command Message. The EQADC also converts
the proper input channel (ANR, ANS, ANT, ANU, ANW, ANX, ANY, and ANZ) by interpreting the
CHANNEL_NUMBER field. As a result, up to 64 externally multiplexed channels appear to the
conversion queues as directly connected signals.
27-108
PXR40 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor