PXR40RM Datasheet, PDF (522/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

Periodic Interrupt Timer (PIT_RTI)
20.5.2.1 Low Power Mode Without RTI Wakeup
The SIU_HALT register may be used to place certain peripherals selectively in low power mode. See
Section 7.3.1.28, Halt Register (SIU_HLT), for more information about the SIU_HLT register. The general
process for setting low power modes is:
1. Disable interrupts for any peripherals that are to be placed in low power mode and ensure there are
no pending interrupts.
2. Using the bit assignment in the SIU_HLT register, set the bits for any modules where low power
operation is desired. Note that the CPU (SIU_HLT[0]) bit should not be selected.
3. The SIU_HLTACK register indicates when a selected peripheral clock has stopped.
4. To re-enable the clock to any peripheral, clear the corresponding bit in the SIU_HLT register and
re-enable the interrupts for the desired peripheral. The SIU_HLTACK updates accordingly when
the peripheral clock has been re-enabled.
NOTE
Most of the peripherals have a MDIS (module disable) bit in the module
control register that can be set to disable the module clock, reducing power
consumption. In most cases the peripheral registers are still readable and
writeable. The SIU_HALT register performs the same function on multiple
modules with a single 32-bit write, however using the SIU_HALT function
also disables R/W function on the peripheral registers for additional power
saving.
20.5.2.2 Low Power Mode With RTI Wakeup
The RTI can be used in conjunction with the SIU_HALT register to enter and exit from low power mode.
See Section 7.3.1.28, Halt Register (SIU_HLT), for more information about the SIU_HALT register. The
general procedure for entering and exiting low power mode is:
1. Configure the interrupt handler for the RTI interrupt. The interrupt handler code can vary,
depending on what behavior is required for the application upon exiting low power mode. More
information on configuring and using the interrupts is found in Section 10.5, Initialization and
Application Information, of the Interrupt Controller chapter.
2. Configure the RTI for the desired timeout period as described in Section 20.5.1, Example
Configuration.
3. Disable interrupts for all peripherals to be placed in low power mode and ensure there are no
pending interrupts.
4. Write the desired bits to the SIU_HLT register, selecting the modules that are to have the low power
mode enabled. Note that if the CPU bit is also set for lowest power operation, an RTI interrupt is
required to exit low power mode.
5. The CPU executes the ‘msync’, ‘isync’, and ‘wait’ instructions and the device enters low power
mode. Note that the ‘msync’ and ‘isync’ instructions ensure that all current core operations
complete before entering low power mode.
20-10
PXR40 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor