PXR40RM Datasheet, PDF (1258/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

Enhanced Time Processing Unit (eTPU2)
Channels 0-2 worst-case service time = 24 CPU clocks.
b. Longest thread of PPWA in mode 0 is 44 CPU clocks with nine RAM accesses.
44 + ((9 RAM accesses +1)* 0 * 2 CPU clock waits) = 44 CPU clocks
Channel 8 worst-case service time = 44 CPU clocks.
c. Longest thread of DIO is ten CPU clocks with four RAM accesses.
10 + ((4 RAM accesses+1) * 0 * 2 CPU clock waits) = 10 CPU clocks
Channel 15 worst-case service time = 10 CPU clocks.
To find the WCL for channel 0, assume channel 0 has just finished service.
Map the channels in the H-M-H-L-H-M-H sequence. See Figure 29-42.
WORST CASE LATENCY
HM H L H M H HM H L
= 10-CYCLE TIME SLOT TRANSITION
= 4-CYCLE NOP INSTRUCTION
CHANNEL 0 CHANNEL 1CHANNEL 2
SERVICED SERVICED SERVICED
CHANNEL 8CHANNEL 15CHANNEL 0
SERVICED SERVICED SERVICED
Figure 29-42. Worst-Case Latency for Channel 0 (First Try)
TPU CH0 WCL TIM 1
Conclusion: with this system configuration, worst-case latencies for channels 0 and 1 are too
high (WCL for channel 1 is the same as WCL for channel 0). Try a different system
configuration.
29-90
PXR40 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor