PXR40RM Datasheet, PDF (642/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

FlexRay Communication Controller (FLEXRAY)
Field
SIDX_A
SIDX_B
Table 22-64. RFSIR Field Descriptions
Description
Start Index — This field defines the number of the message buffer header field of the first message buffer of the
selected FIFO. The controller uses the value of the SIDX field to determine the physical location of the receiver
FIFO’s first message buffer header field.
22.5.2.55 Receive FIFO Depth and Size Register (RFDSR)
Base + 0x008A
Write: POC:config
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
W
FIFO_DEPTH_A/FIFO_DEPTH_B
0
ENTRY_SIZE_A/ENTRY_SIZE_B
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 22-56. Receive FIFO Depth and Size Register (RFDSR)
This register defines the structure of the selected FIFO, i.e. the number of entries and the size of each entry.
Table 22-65. RFDSR Field Descriptions
Field
Description
FIFO_DEPTH_A
FIFO_DEPTH_B
ENTRY_SIZE_A
ENTRY_SIZE_B
FIFO Depth — This field defines the depth of the selected FIFO, i.e. the number of entries.
Entry Size — This field defines the size of the frame data sections for the selected FIFO in 2 byte entities.
22.5.2.56 Receive FIFO A Read Index Register (RFARIR)
Base + 0x008C
0
1
R0
0
W
Reset 0
0
2
3
4
5
6
7
8
9
10
11
12
13
14
15
0
0
0
0
RDIDX
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 22-57. Receive FIFO A Read Index Register (RFARIR)
This register provides the message buffer header index of the next available FIFO A entry that the
application can read.
Table 22-66. RFARIR Field Descriptions
Field
RDIDX
Description
Read Index — This field provides the message buffer header index of the next available FIFO message buffer
that the application can read.
If the old style FIFO mode is configured (MCR.FIMD=0), the controller updates this index by 1 entry, when the
application writes to the FAFAIF flag in the Global Interrupt Flag and Enable Register (GIFER).
If the new style FIFO mode is configured (MCR.FIMD=1), the controller updates this index by PCA entries, when
the application writes to the Receive FIFO Fill Level and POP Count Register (RFFLPCR).
22-58
PXR40 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor