PXR40RM Datasheet, PDF (1154/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

Decimation Filter
28.3.14.1 Example Configurations
The following diagrams illustrate some of the possible options for using the decimation filters in a
cascaded configuration. In all illustrated examples, the DECFILT_x_MCR[IO_SEL] bits are set to select
the eQADC as the source for input conversion data, and the eQADC RFIFOs as destination for the outputs
of the filter(s).
Configuration/Control
CPU
DECFILT_A
(head)
MCR[IO_SEL]=0b00
MCR[CASCD]=0b01
DECFILT_B
(middle)
MCR[IO_SEL]=0b00
MCR[CASCD]=0b11
Data _eQADC
RFIFOs
DECFILT_C
(tail)
MCR[IO_SEL]=0b00
MCR[CASCD]=0b10
Figure 28-18. Cascaded Filters
Configuration/Control
DECFILT_A
(head)
MCR[IO_SEL]=0b00
MCR[CASCD]=0b01
CPU
DECFILT_B
(tail)
MCR[IO_SEL]=0b00
MCR[CASCD]=0b10
Data eQADC
Data
RFIFOs
DECFILT_E
(head)
MCR[IO_SEL]=0b00
MCR[CASCD]=0b01
DECFILT_F
(tail)
MCR[IO_SEL]=0b00
MCR[CASCD]=0b10
Figure 28-19. Multiple Cascaded Filters
28-40
PXR40 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor