PXR40RM Datasheet, PDF (318/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

Interrupts and Interrupt Controller (INTC)
Table 10-8. Interrupt Request Sources (continued)
Hardware
Vector Mode
Offset
Vector
Number ¹
Source²
Description
0x06F0
0x0700
0x0710
0x0720
0x0730
0x0740
0x0750
0x0760
0x0770
0x0780
0x0790
0x07A0
0x07B0
0x07C0
0x07D0
0x07E0
0x07F0
0x0800
0x0810
0x0820
0x0830
0x0840
0x0850
0x0860
0x0870
0x0880
0x0890
0x08A0
111 EQADC_FISR2[NCF]
eQADC A command FIFO 2 non-coherency flag
112 EQADC_FISR2[PF]
eQADC A command FIFO 2 pause flag
113 EQADC_FISR2[EOQF]
eQADC A command FIFO 2 command queue end-of-queue flag
114 EQADC_FISR2[CFFF]
eQADC A command FIFO 2 fill flag
115 EQADC_FISR2[RFDF]
eQADC A receive FIFO 2 drain flag
116 EQADC_FISR3[NCF]
eQADC A command FIFO 3 non-coherency flag
117 EQADC_FISR3[PF]
eQADC A command FIFO 3 pause flag
118 EQADC_FISR3[EOQF]
eQADC A command FIFO 3 command queue end-of-queue flag
119 EQADC_FISR3[CFFF]
eQADC A command FIFO 3 fill flag
120 EQADC_FISR3[RFDF]
eQADC A receive FIFO 3 drain flag
121 EQADC_FISR4[NCF]
eQADC A command FIFO 4 non-coherency flag
122 EQADC_FISR4[PF]
eQADC A command FIFO 4 pause flag
123 EQADC_FISR4[EOQF]
eQADC A command FIFO 4 command queue end-of-queue flag
124 EQADC_FISR4[CFFF]
eQADC A command FIFO 4 fill flag
125 EQADC_FISR4[RFDF]
eQADC A receive FIFO 4 drain flag
126 EQADC_FISR5[NCF]
eQADC A command FIFO 5 non-coherency flag
127 EQADC_FISR5[PF]
eQADC A command FIFO 5 pause flag
128 EQADC_FISR5[EOQF]
eQADC A command FIFO 5 command queue end-of-queue flag
129 EQADC_FISR5[CFFF]
eQADC A command FIFO 5 fill flag
130 EQADC_FISR5[RFDF]
eQADC A receive FIFO 5 drain flag
DSPI B, DSPI C, DSPI D
131
DSPI_BSR[TFUF]
DSPI_BSR[RFOF]
DSPI B combined overrun interrupt requests:
• Transmit FIFO underflow
• Receive FIFO overflow
132 DSPI_BSR[EOQF]
DSPI B transmit FIFO end-of-queue flag
133 DSPI_BSR[TFFF]
DSPI B Tx FIFO Fill request
134 DSPI_BSR[TCF]
DSPI B Tx complete
135 DSPI_BSR[RFDF]
DSPI B Rx FIFO drain request
136
DSPI_CSR[TFUF]
DSPI_CSR[RFOF]
DSPI C combined overrun interrupt requests:
• Transmit FIFO underflow
• Receive FIFO overflow
137 DSPI_CSR[EOQF]
DSPI C transmit FIFO end-of-queue flag
138 DSPI_CSR[TFFF]
DSPI C Tx FIFO Fill request
10-18
PXR40 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor