PXR40RM Datasheet, PDF (655/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

FlexRay Communication Controller (FLEXRAY)
22.5.2.67.25 Protocol Configuration Register 24 (PCR24)
Base + 0x00D0
Write: POC:config
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
cluster_drift_damping
W
max_payload_length_dynamic
micro_per_cycle_min
[19:16]
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 22-92. Protocol Configuration Register 24 (PCR24)
22.5.2.67.26 Protocol Configuration Register 25 (PCR25)
Base + 0x00D2
0
1
R
W
Reset 0
0
2
3
4
5
6
7
8
9
10
11
12
micro_per_cycle_min[15:0]
0
0
0
0
0
0
0
0
0
0
0
Figure 22-93. Protocol Configuration Register 25 (PCR25)
Write: POC:config
13
14
15
0
0
0
22.5.2.67.27 Protocol Configuration Register 26 (PCR26)
Base + 0x00D4
0
1
R allow
_halt_
W ^due
_to_
clock
Reset 0
0
Write: POC:config
2
3
4
5
6
7
8
9
10
11
12
13
14
15
comp_accepted_startup_range_b
micro_per_cycle_max
[19:16]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 22-94. Protocol Configuration Register 26 (PCR26)
22.5.2.67.28 Protocol Configuration Register 27 (PCR27)
Base + 0x00D6
0
1
R
W
Reset 0
0
2
3
4
5
6
7
8
9
10
11
12
micro_per_cycle_max[15:0]
0
0
0
0
0
0
0
0
0
0
0
Figure 22-95. Protocol Configuration Register 27 (PCR27)
Write: POC:config
13
14
15
0
0
0
22.5.2.67.29 Protocol Configuration Register 28 (PCR28)
Base + 0x00D8
0
1
R _{dynamic_slot}
W ^_idle_phase
Reset 0
0
2
3
4
5
6
7
8
9
10
11
12
macro_after_offset_correction
0
0
0
0
0
0
0
0
0
0
0
Figure 22-96. Protocol Configuration Register 28 (PCR28)
Write: POC:config
13
14
15
0
0
0
Freescale Semiconductor
PXR40 Microcontroller Reference Manual, Rev. 1
22-71