PXR40RM Datasheet, PDF (829/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

FlexCAN Module
Table 24-10. FLEXCAN_x_CTRL Field Descriptions (continued)
Field
Description
17
Error Mask
ERR_MSK This bit provides a mask for the Error Interrupt.
0 Error interrupt disabled
1 Error interrupt enabled
18 CAN Engine Clock Source
CLK_SRC This bit selects the clock source to the CAN Protocol Interface (CPI) to be either the system clock (driven by the
PLL) or the crystal oscillator clock (direct feed from the oscillator pin EXTAL). The selected clock is the one fed to
the prescaler to generate the Serial Clock (Sclock). In order to guarantee reliable operation, this bit should only be
changed while the module is in Disable Mode. See Section 24.4.8.4, Protocol Timing, for more information.
0 The CAN engine clock source is the oscillator clock
1 The CAN engine clock source is the bus clock
19 Tx Warning Interrupt Mask
TWRN_MS This bit provides a mask for the Tx Warning Interrupt associated with the TWRN_INT flag in the Error and Status
K
Register. This bit has no effect if the WRN_EN bit in FLEXCAN_x_MCR is negated and it is read as zero when
WRN_EN is negated.
0 Tx Warning Interrupt disabled
1 Tx Warning Interrupt enabled
20 Rx Warning Interrupt Mask
RWRN_MS This bit provides a mask for the Rx Warning Interrupt associated with the RWRN_INT flag in the Error and Status
K
Register. This bit has no effect if the WRN_EN bit in FLEXCAN_x_MCR is negated and it is read as zero when
WRN_EN is negated.
0 Rx Warning Interrupt disabled
1 Rx Warning Interrupt enabled
21 Loop Back
LPB This bit configures FlexCAN to operate in Loop-Back Mode. In this mode, FlexCAN performs an internal loop back
that can be used for self test operation. The bit stream output of the transmitter is fed back internally to the receiver
input. The Rx CAN input pin is ignored and the Tx CAN output goes to the recessive state (logic ‘1’). FlexCAN
behaves as it normally does when transmitting, and treats its own transmitted message as a message received from
a remote node. In this mode, FlexCAN ignores the bit sent during the ACK slot in the CAN frame acknowledge field,
generating an internal acknowledge bit to ensure proper reception of its own message. Both transmit and receive
interrupts are generated.
0 Loop Back disabled
1 Loop Back enabled
22–23 Reserved
24
SMP
Sampling Mode
This bit defines the sampling mode of CAN bits at the Rx input.
0 Just one sample is used to determine the bit value
1 Three samples are used to determine the value of the received bit: the regular one (sample point) and 2
preceding samples, a majority rule is used
Freescale Semiconductor
PXR40 Microcontroller Reference Manual, Rev. 1
24-19