PXR40RM Datasheet, PDF (1407/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

IEEE 1149.1 Test Access Port Controller (JTAGC)
The TAP controller is a synchronous state machine that interprets the sequence of logical values on the
TMS pin. Figure 32-5 shows the machine’s states. The value shown next to each state is the value of the
TMS signal sampled on the rising edge of the TCK signal.
As Figure 32-5 shows, holding TMS at logic 1 while clocking TCK through a sufficient number of rising
edges also causes the state machine to enter the test-logic-reset state.
Freescale Semiconductor
PXR40 Microcontroller Reference Manual, Rev. 1
32-7