PXR40RM Datasheet, PDF (1019/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

Enhanced Queued Analog-to-Digital Converter (EQADC)
Table 27-17. EQADC_CFxRw Field Description
Field
0–31
CFIFOx_DATAw[
Description
CFIFOx Data w (w = 0, .., 3). Reading CFIFOx_DATAw returns the value stored on the w^th entry of CFIFOx.
Each CFIFO is composed of four 32-bit entries, with register 0 being mapped to the one with the smallest
memory mapped address.
27.6.2.13 EQADC CFIFO0 Extension Registers (EQADC_CF0ERw) (w=0, .., 3)
The EQADC CFIFO0 Extension Registers (EQADC_CF0ERw) (w=0, .., 3) provide visibility of the
contents of the extended portion of CFIFO0 for debugging purposes. There are four registers which are
uniquely mapped to its four 32-bit entries. Refer to Section 27.7.4, EQADC Command FIFOs, for more
information on CFIFOs. These registers are read only. Data written to these registers is ignored.
Address: 0x0110, 0x0114, 0x0118, 01011C
0
1
2
3
4
5
R
W
Reset 0
0
0
0
0
0
6
7
8
9
CFIFO0_EDATAw
0
0
0
0
Access: User read only
10
11
12
13
14
15
0
0
0
0
0
0
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
R
CFIFO0_EDATAw
W
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 27-25. EQADC CFIFO0 Extension Registers (EQADC_CF0ERw) (w=0, .., 3)
Field
0–31
CFIFO0_EDATAw
Table 27-18. EQADC_CF0ERw Field Description
Description
CFIFOx Extension Data w (w = 0, .., 3). Reading CFIFO0_EDATAw returns the value stored on the
w^th entry of CFIFO0’s extended portion.
27.6.2.14 EQADC RFIFO Registers (EQADC_RFxRw) (x=0, .., 5; w=0, .., 3)
The EQADC RFIFO Registers (EQADC_RFxRw) (x=0, .., 5; w=0, .., 3) provide visibility of the contents
of a RFIFO for debugging purposes. Each RFIFO has four registers which are uniquely mapped to its four
16-bit entries. Refer to Section 27.7.5, EQADC Result FIFOs, for more information on RFIFOs. These
registers are read only. Data written to these registers is ignored.
Freescale Semiconductor
PXR40 Microcontroller Reference Manual, Rev. 1
27-37