PXR40RM Datasheet, PDF (1365/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

Nexus Development Interface (NDI)
MCKO
Direct Branch
Error
MSEO
MDO[1:0]
11 00 00 00 00 11 00 00 10 00 00 00 01 00 00
DBM:
TCODE = 3
Source Processor = 0b0000
Number of Sequential Instructions = 3
Error:
TCODE = 8
Source Processor = 0b0000
Error Code = 1 (Queue Overrun – BTM Only)
Figure 31-28. Program Trace—Direct Branch (Traditional) and Error Messages
MCKO
MSEO
MDO[1:0] 00 11 00 00 00 11 10 11 00 11 10 10 11 11 01 11 10 10 10 11 01 11 00
TCODE = 12
Source Processor = 0b0000
Number of Sequential Instructions = 3
Full Target Address = 0xDEAD_FACE
Figure 31-29. Program Trace—Indirect Branch with Sync. Message
31.14.6 Data Trace
This section deals with the data trace mechanism supported by the NZ7C3 module. Data trace is
implemented via data write messaging (DWM) and data read messaging (DRM), as per the IEEE-ISTO
5001-2011 standard.
31.14.6.1 Data Trace Messaging (DTM)
Data trace messaging for e200z7 is accomplished by snooping the e200z7 virtual data bus (between the
CPU and MMU), and storing the information for qualifying accesses (based on enabled features and
matching target addresses). The NZ7C3 module traces all data access that meet the selected range and
attributes.
NOTE
Data trace is only performed on the e200z7 virtual data bus. This allows for
data visibility for the incorporated data cache. Only e200z7 CPU initiated
accesses are traced. No DMA accesses to the NXDM system bus are traced.
Data trace messaging can be enabled in one of two ways:
• Setting the TM field of the DC1 register to enable data trace (DC1[TM]).
• Using WT[DTS] to enable data trace on watchpoint hits (e200z7 watchpoints are configured within
the Nexus1 module)
Freescale Semiconductor
PXR40 Microcontroller Reference Manual, Rev. 1
31-49