PXR40RM Datasheet, PDF (186/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

System Integration Unit (SIU)
7.2 External Signal Description
Table 7-3 lists the external pins used by the SIU.
Table 7-3. SIU Signal Properties
Name
Function
I/O
Type
Resets
RESET
Reset input
Input
RSTOUT
Reset output
Output
System Configuration
GPIOn
General-purpose I/O
I/O
BOOTCFG[0:1]_
IRQ[2:3]_
GPIO[211:212]
Boot configuration input
Interrupt request
General-purpose I/O
Input
Input
I/O
WKPCFG_
NMI_
GPIO[213]
Weak-pull configuration
Non-maskable interrupt to core
General-purpose I/O
Input
Input
I/O
IRQ[0:15] ¹
External Interrupt
External interrupt request input
Input
1 _{The GPIO and IRQ signals are multiplexed with other functions on the device.}
7.2.1 Detailed Signal Descriptions
7.2.1.1 Reset Input (RESET)
RESET is an active-low input signal asserted by an external device during a power-on reset (POR) or
external reset. RESET assertion for ten clock cycles or more will cause the internal reset. There will be an
additional two clock delay from the reset pin change to the event actually taking place. Asserting the
RESET signal while the device is processing a reset restarts the reset process at the beginning.
RESET has a glitch detector logic that senses electrical fluctuations on the V_DDEH input pins that drop
below the switch point value for more than two clock cycles. The switch point value is between the
maximum V_IL and minimum V_IH specifications for the V_DDEH input pins.
PXR40 Microcontroller Reference Manual, Rev. 1
7-4
Freescale Semiconductor