PXR40RM Datasheet, PDF (737/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

FlexRay Communication Controller (FLEXRAY)
Register
MBCCSRt
MBCCFRt
MBFIDRt
Field
MCM
MBT
MTD
MTM
CHA
CHB
CCFE
CCFMSK
CCFVAL
FID
Table 22-120. Transmit Buffer Configuration
Value
-
0
1
0
1
0
1
000011
000000
S
used only for double buffers
single transmit buffer
transmit buffer
event transition mode
assigned to channel A
not assigned to channel B
cycle counter filter enabled
Description
cycle set = {4n} = {0,4,8,12,...}
assigned to slot S
The availability of data in the transmit buffer is indicated by the commit bit MBCCSRt[CMT] and the lock
bit MBCCSRt[LCKS].
The receive message buffer has the message buffer number r and has following configuration
Table 22-121. Receive Buffer Configuration
Register
MBCCSRr
MBCCFr
MBFIDRr
Field
MCM
MBT
MTD
MTM
CHA
CHB
CCFE
CCFMSK
CCFVAL
FID
Value
-
-
0
-
1
0
1
000001
000000
S
n/a
n/a
receive buffer
n/a
assigned to channel A
not assigned to channel B
cycle counter filter enabled
Description
cycle set = {2n} = {0,2,4,6,...}
subscribed slot
Furthermore the assumption is that both message buffers are enabled (MBCCSRt[EDS] = 1 and
MBCCSRr[EDS] = 1)
NOTE
The cycle set {4n+2} = {2,6,10,...} is assigned to the receive buffer only.
The cycle set {4n} = {0,4,8,12,...} is assigned to both buffers.
Freescale Semiconductor
PXR40 Microcontroller Reference Manual, Rev. 1
22-153