PXR40RM Datasheet, PDF (1164/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

Decimation Filter
28.5.2.1.3 eQADC Configuration for Decimation Filter
Configure an Alternate Configuration Control Register (ADC_ACR1 to ADC_ACR8) to select
Decimation Filter A as the destination for an ADC conversion, by setting ADC_ACRn[DEST] = 1. To
select a signed format, ADC_ACRn[FMTA]=1.
The ADC_ACRn register format has the form:
0
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15
R RET_ 0
W
INH
DEST
0
0
0
FMTA
RESSEL
ATBSEL PRE_GAIN
Note that the ADC_ADRn registers are internal to the ADC and can only be accessed indirectly by writing
a register write command to the eQADC CFIFO. To do this the CPU should write a command to any eQADC
CFIFO with the following format:
0
1
2
3
4
5
6
7
8
EB
R/W
EOQ PAUSE REP RESERVED _(0b0) BN _(0b0)
CFIFO Header
9 10 11 12 13 14 15
ADC_REGISTER HIGH BYTE
ADC Command
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
ADC_REGISTER LOW BYTE
ADC_REG_ADDRESS
ADC Command
For example, to update ADC_ACR1[DEST] = 1, ADC_ACR1[FMTA]=1
• set the bit field ADC_REG_ADDRESS = 0x30
• set the bit field ADC_REGISTER LOW BYTE = 0x00
• set the bit field ADC_REGISTER HIGH BYTE = 0x06
28.5.2.1.4 eQADC Command
To cause the ADC conversion to be transferred to the Decimation filter selected by the method described
in Section 28.5.2.1.3, a Conversion Command for Alternate Configurations must be applied to the eQADC
CFIFO. The form of the command is as follows:
0
1
2
3
4
5
6
7
EB
EOQ PAUSE REP RESERVED _(0b0) BN CAL
CFIFO Header
8
9 10 11 12 13
MESSAGE_TAG
LST
ADC Command
14 15
TSR FFMT
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
CHANNEL_NUMBER
ALT_CONFIG_SEL
ADC Command
28-50
PXR40 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor