PXR40RM Datasheet, PDF (1011/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

Enhanced Queued Analog-to-Digital Converter (EQADC)
Table 27-12. EQADC_FISRx Field Description (continued)
Field
Description
20–23 CFIFOx Transfer Next Pointer. TNXTPTRx indicates the index of the next entry to be removed from CFIFOx when
TNXTPTRx it completes a transfer. When TNXTPTRx is zero, it points to the entry with the smallest memory-mapped address
inside CFIFOx. TNXTPTRx is only updated when a command transfer is completed. If the maximum index number
(CFIFO depth minus one) is reached, TNXTPTRx is wrapped to zero, else, it is incremented by one. For details
refer to Section 27.7.4.1, CFIFO Basic Functionality. Writing any value to TNXTPTRx has no effect.
24–27
RFCTRx
RFIFOx Entry Counter. RFCTRx indicates the number of data items stored in the RFIFOx. When the EQADC
stores a piece of new data into RFIFOx, it increments RFCTRx by one. Reading the whole word, half-word or any
bytes of the corresponding EQADC_RFPR decrements RFCTRx by one. Writing any value to RFCTRx itself has
no effect.
28–31
POPNXT
PTRx
RFIFOx Pop Next Pointer. POPNXTPTRx indicates the index of the entry that will be returned when
EQADC_RFPRx is read. When POPNXTPTRx is zero, it points to the entry with the smallest memory-mapped
address inside RFIFOx. POPNXTPTRx is updated when EQADC_RFPRx is read. If the maximum index number
(RFIFO depth minus one) is reached, POPNXTPTRx is wrapped to zero, else, it is incremented by one. For details
refer to Section 27.7.5.1, RFIFO Basic Functionality. Writing any value to POPNXTPTRx has no effect.
27.6.2.8 EQADC CFIFO Transfer Counter Registers (EQADC_CFTCR)
The EQADC CFIFO Transfer Counter Registers (EQADC_CFTCR) record the number of commands
transferred from a CFIFO. The EQADC_CFTCR supports the monitoring of command transfers from a
CFIFO.
Address: 0x0090
Access: User read/write
0
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15
R0
0
0
0
0
W
TC_CF0
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R0
0
0
0
0
W
TC_CF1
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 27-12. EQADC CFIFO Transfer Counter Register 0 (EQADC_CFTCR0)
Address: 0x0094
Access: User read/write
0
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15
R0
0
0
0
0
W
TC_CF2
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R0
0
0
0
0
W
TC_CF3
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 27-13. EQADC CFIFO Transfer Counter Register 1 (EQADC_CFTCR1)
Freescale Semiconductor
PXR40 Microcontroller Reference Manual, Rev. 1
27-29