PXR40RM Datasheet, PDF (970/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

Enhanced Serial Communication Interface (eSCI)
The receiver reports the errors detected during frame reception at the end of the reception of the last stop
bit of a frame. For error reporting the receiver utilizes the OR, NF, FE, and PF flags in the Interrupt Flag
and Status Register 1 (eSCI_IFSR1).
If the receiver has detected an overrun as described in Section 26.4.5.3.11, Receiver Overrun, only the OR
flag is set. All other error flags are not updated.
If the receiver has not detected an overrun and has detected noise as described in Section 26.4.5.3.13, Bit
Sampling, the NF flag is set.
If the receiver has not detected an overrun and has detected a framing error as described in
Section 26.4.5.3.13, Bit Sampling, the FE flag is set.
If the receiver has not detected an overrun and has detected a parity error as described in
Section 26.4.5.3.19, Parity Checking, the PF flag is set.
26.4.5.5 Multiprocessor Communication
The multiprocessor communication allows one processor to send blocks of frames to other processors on
the same serial link. To avoid the received data interrupt for frames not intended for the processor, the eSCI
receiver can be put into the Wakeup state. If the receiver is in the Wakeup state, the eSCI will still load the
received data into the SCI Data Register (ESCI_DR), but will not set the RDRF flag and consequently not
request the RDRF interrupt.
The receiver leaves the Wakeup state and clears the RWU bit in the Control Register 1 (eSCI_CR1) when
the wakeup pattern configured by WAKE bit in Control Register 1 (eSCI_CR1) is received. The eSCI
module supports two types of wakeup patterns, the idle-line wakup pattern and the address-mark wakeup
pattern.
26.4.5.5.1 Idle-Line Wakeup
The idle-line wakeup mode is selected when the WAKE bit in Control Register 1 (eSCI_CR1) is 0. In this
mode, the receiver leaves the wakeup state, when an idle character is detected as described in
Section 26.4.5.3.8, Idle Character Detection. The next received frame is the address frame that contains
address information which can be evaluated by the application. If the application decides not to receive the
frame block, it can set the RWU bit in the Control Register 1 (eSCI_CR1) and return the receiver to the
wakeup state.
Frame Block
Idle Character
Frame Block
Address Frame
Receiver Wakeup
Figure 26-36. Idle-Line Wakeup Format
26-42
PXR40 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor