PXR40RM Datasheet, PDF (993/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

Enhanced Queued Analog-to-Digital Converter (EQADC)
Table 27-3. EQADC External Signals (continued)
Signal Name
Description
AN20-AN39
Single-ended analog input.
AN20 through AN39 are single-ended analog inputs to the two on-chip ADCs.
INA_ADC0_0 -
INA_ADC0_9
(not external to the chip) Single-ended analog input.
INA_ADC0_0 through INA_ADC0_9 are single-ended analog inputs to the on-chip ADC0.
INA_ADC1_0 -
INA_ADC1_9
(not external to the chip) Single-ended analog input.
INA_ADC1_0 through INA_ADC1_9 are single-ended analog inputs to the on-chip ADC1.
MA0-MA2
External multiplexer control signals.
MA0, MA1, and MA2 combined form a select signal associated with external multiplexers.
VRH, VRL
Voltage reference high and voltage reference low.
VRH and VRL are voltage references for the ADCs. VRH is the highest voltage reference, while VRL is
the lowest voltage reference.
VDDA, VSSA
5V VDD and VSS for the 5V analog components.
VDDA is the positive power supply pin for the ADCs and VSSA is the negative power supply pin for the
ADCs. Refer to electrical specifications.
REFBYPC
Reference Bypass Capacitor
The REFBYPC pin is used to connect an external bypass capacitor between REFBYPC and VRL. The
value of this capacitor should be 100nf. This bypass capacitor is used to provide a stable reference
voltage for the ADC.
ETRIG0-ETRIG5
External trigger
The external trigger signals are for hardware triggering. The EQADC can detect rising edge, falling
edge, high level and low level on each of the external trigger signals. ETRIGx triggers CFIFOx. The
EQADC also uses digital filters for these external trigger signals.
NOTES:
1 _{During and just after POR negates, internal pull resistors can be enabled, resulting in as much as 4 mA of current draw.}
The pull resistors are disabled when the system clock propagates through the device.
27.5 Pin Mapping to Channel Mapping
Table 27-4 shows the pin mapping to channel mapping to show which signals go to which ADC. For
internal and external multiplexing channel assignments, see Table 27-42.
Table 27-4. Pin Mapping to Channel Mapping
Analog Input Pin
416 package
Function
ANA0–ANA23¹
ANB0–ANB23
AN24–AN39
—
—
—
—
—
Single ended conversion
Single ended conversion
Single ended conversion
VRH
VRL
50% (VRH–VRL)²
75% (VRH–VRL)
25% (VRH–VRL)
ADC Number eQADC_A eQADC_B
Channel Channel
eQADC_A eQADC_B Number Number
0, 1
—
0–23
—
—
0,1
—
0–23
0, 1
0, 1
24–39
24–39
0, 1
0, 1
40
40
0, 1
0, 1
41
41
0, 1
0, 1
42
42
0, 1
0, 1
43
43
0, 1
0, 1
44
44
Freescale Semiconductor
PXR40 Microcontroller Reference Manual, Rev. 1
27-11