PXR40RM Datasheet, PDF (1282/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

External Bus Interface (EBI)
NOTE
The exception to the preceding D_WE description is that for 16-bit port
transfers (DBM=1 or PS=1), only the D_WE[0:1] signals are used,
regardless of whether D_ADD_DAT[0:15] or D_ADD_DAT[16:31] are
selected (via the D16_31 bit in the EBI_MCR). This means for the case
where D_ADD_DAT[16:31] are selected, that WE0 indicates that
D_ADD_DAT[16:23] contains valid data, and WE1 indicates that
D_ADD_DAT[24:31] contains valid data.
The Write/Byte Enable lines affected in a transaction for a 32-bit port (PS = 0) and a 16-bit port (PS=1)
are shown in Table 30-12. Only Big Endian byte ordering is supported by the EBI.
Table 30-12. Write/Byte Enable Signals Function ¹
Transfer
Size
Address
32-Bit Port Size
16-Bit Port Size²
A30
A31
D_WE D_WE D_WE D_WE D_WE D_WE D_WE D_WE
0
1
2
3
0
1
2
3
0
0
X
X
Byte
0
1
1
0
X
X
X
X
1
1
X
X
0
0
X
X
X
X
16-bit
1
0
X
X
X
X
32-bit
0
0
X
X
X
X
X³
X³
Burst
0
0
X
X
X
X
X
X
1 _{This table applies to aligned internal master transfers only. In the case of a misaligned internal master}
transfer that is split into multiple aligned external transfers, not all of the write enables X’d in the table
will necessarily assert. See Section 30.4.2.11, Misaligned Access Support.
2 _{Also applies when DBM=1 for 16-bit data bus mode.}
3 _{This case consists of two 16-bit external transactions, but for both transactions the D_WE[0:1] signals}
are the only D_WE signals affected.
30.4.1.12 Slower-Speed Clock Modes
For memories that cannot run with a full-speed external bus, the EBI supports slower-speed clock modes.
Refer to Section 30.1.4.4, Slower-Speed Modes for more details on this feature. The timing diagrams for
slower-speed modes are identical to those for full-speed mode, except that the frequency of D_CLKOUT
is reduced.
30.4.1.13 Stop and Module Disable Modes for Power Savings
See Section 30.1.4, Modes of Operation for a description of the power saving modes.
30-20
PXR40 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor