PXR40RM Datasheet, PDF (834/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

FlexCAN Module
a stream of less than 11 consecutive recessive bits, the internal counter resets itself to zero without
affecting the Tx_Err_Counter value.
• If during system start-up, only one node is operating, then its Tx_Err_Counter increases in each
message it is trying to transmit, as a result of acknowledge errors (indicated by the ACK_ERR bit
in the Error and Status Register). After the transition to ‘Error Passive’ state, the Tx_Err_Counter
does not increment anymore by acknowledge errors. Therefore the device never goes to the ‘Bus
Off’ state.
• If the Rx_Err_Counter increases to a value greater than 127, it is not incremented further, even if
more errors are detected while being a receiver. At the next successful message reception, the
counter is set to a value between 119 and 127 to resume to ‘Error Active’ state.
Base + 0x001C
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R
0000000000000000
W
RESET: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
Rx_Err_Counter
W
Tx_Err_Counter
RESET: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
= Unimplemented or Reserved
Figure 24-9. Error Counter Register (FLEXCAN_x_ECR)
24-24
PXR40 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor