PXR40RM Datasheet, PDF (1363/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

Nexus Development Interface (NDI)
31.14.2 Relative Addressing
The relative address feature is compliant with the IEEE-ISTO 5001-2011 standard recommendations, and
is designed to reduce the number of bits transmitted for addresses of indirect branch messages.
The address transmitted is relative to the target address of the instruction which triggered the previous
indirect branch (or sync) message. It is generated by XOR’ing the new address with the previous address,
and then using only the results up to the most significant 1 in the result. To recreate this address, an XOR
of the (most-significant 0-padded) message address with the previously decoded address gives the current
address.
Previous address (A1) =0x0003FC01, New address (A2) = 0x0003F365
Message Generation:
A1 = 0000 0000 0000 0011 1111 1100 0000 0001
A2 = 0000 0000 0000 0011 1111 0011 0110 0101
A1 A2 = 0000 0000 0000 0000 0000 1111 0110 0100
Address Message (M1) = 1111 0110 0100
Address Re-creation:
A1 M1 = A2
A1 = 0000 0000 0000 0011 1111 1100 0000 0001
M1 = 0000 0000 0000 0000 0000 1111 0110 0100
A2 = 0000 0000 0000 0011 1111 0011 0110 0101
Figure 31-25. Relative Address Generation and Re-creation
31.14.3 Branch and Predicate Instruction History (HIST)
If DC[PTM] is set, BTM messaging uses the branch history format. The branch history (HIST) packet in
these messages provides a history of direct branch execution used for reconstructing the program flow.
This packet is implemented as a left-shifting shift register. The register is always pre-loaded with a value
of one (1). This bit acts as a stop bit so that the development tools can determine which bit is the end of
the history information. The pre-loaded bit itself is not part of the history, but is transmitted with the
packet.
A value of one (1) is shifted into the history buffer on a taken branch (condition or unconditional) and on
any instruction whose predicate condition executed as true. A value of zero (0) is shifted into the history
buffer on any instruction whose predicate condition executed as false as well as on branches not taken.
This includes indirect as well as direct branches were not taken. For the evsel instruction, two bits are
shifted in, corresponding to the low element (shifted in first) and the high element (shifted in second)
conditions.
Freescale Semiconductor
PXR40 Microcontroller Reference Manual, Rev. 1
31-47