PXR40RM Datasheet, PDF (517/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

Periodic Interrupt Timer (PIT_RTI)
20.3.2.2 Timer Load Value Register (PIT_RTI_LDVAL, PIT_CHn_LDVAL)
This register selects the timeout period for the timer interrupts.
Offset: channel_base + 0x00
RTI base = 0x0F0
CH0 base = 0x100
CH1 base = 0x110
CH2 base = 0x120
CH3 base = 0x130
Access: User read/write
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
TSV[0:31]
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 20-3. Timer Load Value Register (PIT_RTI_LDVAL, PIT_CHn_LDVAL)
Field
0–31
TSV
Table 20-3. PIT_RTI_LDVAL, PIT_CHn_LDVAL Field Descriptions
Description
Time Start Value Bits. These bits set the timer start value. The timer counts down until it reaches 0,
then it generates an interrupt and loads this register value again. Writing a new value to this register
does not restart the timer, instead the value is loaded once the timer expires. To abort the current
cycle and start a timer period with the new value, the timer must be disabled and enabled again (see
Figure 20-8).
20.3.2.3 Current Timer Value Register (PIT_RTI_CVAL, PIT_CHn_CVAL)
This register indicates the current timer position.
Offset: channel_base + 0x04
Access: User read
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
TVL[31:0]
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 20-4. Current Timer Value Register (PIT_RTI_CVAL, PIT_CHn_CVAL)
Table 20-4. PIT_RTI_CVAL, PIT_CHn_CVAL Field Descriptions
Field
0–31
TVL
Description
Current Timer Value. These bits represent the current timer value. Note that the timer uses a
downcounter.
NOTE: The timer values are frozen in Debug mode if the FRZ bit is set in the PIT Module Control
Register (see Figure 20-2)
20.3.2.4 Timer Control Register (PIT_RTI_TCTRL, PIT_CHn_TCTRL)
This register contains the control bits for each timer.
Freescale Semiconductor
PXR40 Microcontroller Reference Manual, Rev. 1
20-5