PXR40RM Datasheet, PDF (387/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

Flash Memory Array and Control
Step 1
Step 2
User mode read state
Write MCR
ERS = 1
Select blocks
Abort
WRITE
EHV = 0
PEG = 0
Step 3 Erase interlock write
Step 4
Write MCR
ERS = 0
User mode read state
Step 5
EHV = 1
High voltage active
WRITE
ESUS = 1
Read MCR
DONE = 1
Access MCR
DONE = 0
DONE
?
PEG Valid Period
DONE = 1
ESUS = 0
EHV = 1
Erase suspend
Write MCR
EHV = 0
Write MCR
PGM = 1
Step 6 Read MCR
Program, Step 2
Success
PEG = 1
Step 7
PEG
?
Failure
PEG = 0
Write MCR
EHV = 0
Note: ESUS cannot be cleared while
EHV = 0. ESUS and EHV cannot
be changed in a single
write operation.
Step 8
Erase
Yes
more blocks
?
No
Step 9 Write MCR
Go to Step 2
Note: PEG will remain valid under this
condition until EHV is set high or
ERS is cleared.
ERS = 0
User mode read state
Figure 12-18. Erase Sequence
12.3.6 Flash Shadow Block
The flash shadow block is a memory-mapped block in the flash memory map. Program and erase of the
shadow block are enabled when FLASH_x_MCR[PEAS] = 1 only. After the user has begun an erase
operation on the shadow block, the operation cannot be suspended to program the main address space and
vice-versa. The user must terminate the shadow erase operation to program or erase the main address
space.
Freescale Semiconductor
PXR40 Microcontroller Reference Manual, Rev. 1
12-35