PXR40RM Datasheet, PDF (587/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

FlexRay Communication Controller (FLEXRAY)
Peripheral
Bridge B
FLEXRAY
CHI
HIF
config
PE
SEQ
SEARCH
TxA
System
Memory
System Bus
LUT
BCU
BMIF
RxA
TCU
FR_A_RX
FR_A_TX
FR_A_TX_EN
FR_B_RX
FR_B_TX
FR_B_TX_EN
FR_DBG[0]
FR_DBG[1]
FR_DBG[2]
FR_DBG[3]
Figure 22-1. FLEXRAY Block Diagram
The protocol engine has two transmitter units TxA and TxB and two receiver units RxA and RxB for
sending and receiving frames through the two FlexRay channels. The time control unit (TCU) is
responsible for maintaining global clock synchronization to the FlexRay network. The overall activity of
the PE is controlled by the sequencer engine (SEQ).
The controller host interface provides host access to the module’s configuration, control, and status
registers, as well as to the message buffer configuration, control, and status registers. The message buffers
themselves, which contain the frame header and payload data received or to be transmitted, and the slot
status information, are stored in the flexray memory.
The clock domain crossing unit implements signal crossing from the CHI clock domain to the PE clock
domain and vice versa, to allow for asynchronous PE and CHI clock domains.
The controller stores the frame header and payload data of frames received or of frames to be transmitted
in the flexray memory. The application accesses the flexray memory to retrieve and provide the frames to
be processed by the controller. In addition to the frame header and payload data, the controller stores the
synchronization frame related tables in the flexray memory for application processing.
The flexray memory is located in the system memory of the MCU. The controller has access to the flexray
memory via its bus master interface (BMIF). The host provides the start address of the flexray memory
window within the system memory by programming the System Memory Base Address Register
(SYMBADR). All flexray memory related offsets are stored in offset registers. The physical address
pointer into the flexray memory window of the MCU system memory is calculated using the offset values
the flexray memory base address.
Freescale Semiconductor
PXR40 Microcontroller Reference Manual, Rev. 1
22-3