PXR40RM Datasheet, PDF (949/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

Enhanced Serial Communication Interface (eSCI)
26.4 Functional Description
This section provides a complete functional description of the eSCI block, detailing the operation of the
design from the end user perspective in a number of subsections.
26.4.1 Module Control
The operational mode of the module is controlled by the MDIS bit in the Control Register 2 (eSCI_CR2).
The module can transmit and receives data when it is enabled, i.e MDIS=0.
26.4.2 Frame Formats
The eSCI module uses the standard NRZ mark/space data format. The eSCI supports three basic frame
types, which are the data frames, break characters, and idle characters.
26.4.2.1 Data Frame Formats
Each data frame contains a character that is surrounded by a start bit, an optional parity or address bit, and
one or two stop bits. The supported data frame formats for transmission and reception are specified in
Table 26-18. The supported data frame formats for reception only are specified in Table 26-19.
Table 26-18. Supported Data Frame Formats for RX and TX
Control
Frame Content
eSCI_CR3
eSCI_CR1
Payload Bits
M2
M
PE
WAKE
Start
Bits
Character
Bits
Address
Bits¹
Parity
Bits
Stop
Bits
LIN byte fields (Figure 26-15)
0
0
0
0
1
8
0
0
1
SCI Frames (8 payload bits)(Figure 26-16)
0
0
0
0
1
8
0
0
1
0
0
0
1
1
7
1
0
1
0
0
1
0
1
7
0
1
1
SCI Frames (9 payload bits) (Figure 26-17)
0
1
0
0
1
9
0
0
1
0
1
0
1
1
8
1
0
1
0
1
1
0
1
8
0
1
1
1 _{The address bit identifies the frame as an address character. See Section 26.4.5.5, Multiprocessor Communication.}
Freescale Semiconductor
PXR40 Microcontroller Reference Manual, Rev. 1
26-21