PXR40RM Datasheet, PDF (381/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

Flash Memory Array and Control
A software mechanism is provided to independently lock or unlock each block in high-, mid-, and
low-address space against program and erase. Two hardware locks are also provided to enable/disable the
FC for program/erase. See Section 12.3.4.1, Software Locking, for more information.
12.3.4 Flash Programming
Programming changes the value stored in an array bit from logic 1 to logic 0 only. Programming cannot
change a stored logic 0 to a logic 1. Addresses in locked/disabled blocks cannot be programmed. The user
can program the values in any or all of four words within a page in a single program sequence. Word
addresses are selected using bits 3:2 of the page-bound word.
Whenever a program operation occurs, ECC bits are programmed. ECC is handled on a 64-bit boundary.
Thus, if only one word in any given 64-bit ECC segment is programmed, the adjoining word (in that
segment) should not be programmed because ECC calculation has already completed for that 64-bit
segment. Attempts to program the adjoining word will probably result in an operation failure. It is
recommended that all programming operations be from 64 bits to 128 bits, and be 64-bit aligned. The
programming operation should completely fill selected ECC segments within the page.
The program operation consists of the following sequence of events:
1. Change the value in the FLASH_x_MCR[PGM] bit from a 0 to a 1.
NOTE
Ensure the block that contains the address to be programmed is unlocked.
See Section 12.2.2.2, Low/Mid Address Space Block Locking Register
(FLASH_x_LMLR), Section 12.2.2.3, High Address Space Block Locking
Register (FLASH_x_HLR), and Section 12.2.2.4, Secondary Low/Mid
Address Space Block Locking Register (FLASH_x_SLMLR), for more
information.
2. Write the first address to be programmed in the flash module with the program data. This write is
referred to as a program data interlock write. An interlock write may be either be an aligned word
or doubleword.
3. If more than one word or doubleword is to be programmed, write each additional address in the
page with data to be programmed. This is referred to as a program data write. All unwritten data
words default to 0xFFFF_FFFF.
4. Write a logic 1 to the FLASH_x_MCR[EHV] bit to start the internal program sequence or skip to
step 9 to terminate.
5. Wait until the FLASH_x_MCR[DONE] bit goes high.
6. Confirm FLASH_x_MCR[PEG] = 1.
7. Write a logic 0 to the FLASH_x_MCR[EHV] bit.
8. If more addresses are to be programmed, return to step 2.
9. Write a logic 0 to the FLASH_x_MCR[PGM] bit to terminate the program sequence.
The program sequence is presented graphically in Figure 12-17. The program suspend operation detailed
in Figure 12-17 is discussed in Section 12.3.4.1.1, Flash Program Suspend/Resume.
Freescale Semiconductor
PXR40 Microcontroller Reference Manual, Rev. 1
12-29