PXR40RM Datasheet, PDF (1134/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

Decimation Filter
28.2.2.6 Decimation Filter Interface Output Buffer Register (DECFILT_x_OB)
Address: DECFILT_x_BASE + 0x014
Access: User read only
R0
0
0
0
0
0
0
0
0
0
0
0
OUTTAG[3:0]
W
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
R
OUTBUF[15:0]
W
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 28-7. Decimation Filter Interface Output Buffer Register (DECFILT_x_OB)
Table 28-9. DECFILT_x_OB Field Descriptions
Field
Description
0–11
12–15
OUTTAG
16–31
OUTBUF
Reserved
Decimation filter output tag bits—The OUTTAG[3:0] bit field is defined as a selector signal and it is used to
identify different destinations for the OUTBUF[15:0] data.
When the output result destination is an eQADC, OUTTAG holds the same value as the DECFILT_x_IB[INTAG],
which is used to address the destination RFIFO.
Output Buffer Data—The OUTPBUF[15:0] bit field is the result data in the decimation filter Output Buffer. It
represents a fixed point signed number in two’s complement format and is updated only when a decimated result
is ready to be transmitted, meaning it contains the last decimated result from the filter.
28.2.2.7 Decimation Filter Coefficient n Register (DECFILT_x_COEFn)
Address: DECFILT_x_BASE + 0x020–0x040
Access: User read/write
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
8{COEFn[23]}
W
COEFn[23:16]
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
R
COEFn[15:0]
W
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 28-8. Decimation Filter Coefficient n Register (DECFILT_x_COEFn)
28-20
PXR40 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor