PXR40RM Datasheet, PDF (950/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

Enhanced Serial Communication Interface (eSCI)
eSCI_CR3
M2
1
1
Table 26-19. Supported Data Frame Formats for RX only
Control
Frame Content
eSCI_CR1
Payload Bits
M
PE
WAKE
Start
Bits
Character
Bits
Address
Bits
Parity
Bits
SCI Frames (2 stop bits) (see Figure 26-18)
0
1
0
1
8
0
1
1
1
0
1
12
0
1
The structure of the LIN frames in normal polarity is shown in Figure 26-15.
Stop
Bits
2
2
START
BIT ^{BIT0 BIT1 BIT2}
BIT3 BIT4 BIT5 BIT6
BIT7
STOP
BIT
Figure 26-15. LIN Byte Field Format
The structures of the supported SCI frame formats with 8 payload bits are shown in Figure 26-16.
START
BIT ^{BIT0 BIT1 BIT2}
BIT3 BIT4 BIT5 BIT6
BIT7
STOP
BIT
START
BIT
BIT0
BIT1
BIT2
BIT3
BIT4
BIT5
BIT6
ADDR STOP
BIT BIT
START
BIT
BIT0
BIT1
BIT2
BIT3
BIT4
BIT5
BIT6
PARITY STOP
BIT BIT
Figure 26-16. SCI Frame Formats (8 payload bits)
The structures of the supported SCI frame formats with 9 payload bits are shown in Figure 26-17.
START
BIT ^{BIT0 BIT1 BIT2}
BIT3 BIT4 BIT5 BIT6 BIT7
BIT8
STOP
BIT
START
BIT
BIT0
BIT1
BIT2
BIT3
BIT4
BIT5
BIT6
BIT7
ADDR STOP
BIT
BIT
START
BIT ^BIT0
BIT1
BIT2
BIT3
BIT4
BIT5
BIT6
BIT7
PARITY STOP
BIT
BIT
Figure 26-17. SCI Frame Formats (9 payload bits)
The structures of the supported SCI frame formats with 2 stop bits in normal polarity are shown in
Figure 26-18. This frame format is supported for reception only.
START
BIT
BIT0
BIT1
BIT2
BIT3
BIT4
BIT5
BIT6
BIT7
PARITY STOP
BIT
BIT
STOP
BIT
START
BIT ^BIT0
BIT1
BIT2
BIT3
BIT4
BIT5
BIT6
BIT7
BIT8
BIT9
BIT10
BIT11
PARITY
BIT
STOP
BIT
STOP
BIT
Figure 26-18. SCI Frame Formats (2 stop bits)
26-22
PXR40 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor