PXR40RM Datasheet, PDF (566/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

Enhanced Direct Memory Access Controller (eDMA)
21.4.1 eDMA Basic Data Flow
The eDMA transfers data based on a two-deep, nested flow. The basic flow of a data transfer can be
partitioned into three segments. As shown in Figure 21-25, the first segment involves the channel service
request. In the diagram, this example uses the assertion of the eDMA peripheral request signal to request
service for channel n. Channel service request via software and the TCDn.START bit follows the same
basic flow as an eDMA peripheral request. The eDMA peripheral request input signal is registered
internally and then routed through the DMA engine, first through the control module, then into the
program model/channel arbitration module. In the next cycle, the channel arbitration is performed using
the fixed-priority or round-robin algorithm. After the arbitration is complete, the activated channel number
is sent through the address path and converted into the required address to access the TCD local memory.
Next, the TCD memory is accessed and the required descriptor read from the local memory and loaded
into the DMA engine address path channel {x,y} registers. The TCD memory is organized 64-bits in width
to minimize the time needed to fetch the activated channel’s descriptor and load it into the eDMA engine
address path channel {x,y} registers.
eDMA
SRAM
Transfer control descriptor
(TCD)
Slave write address
Slave write data
SRAM
TCD0
eDMA engine
Bus read data
Data path
Bus write data
Bus address
Program model/
channel arbitration
Address
path
Control
TCDn – 1*
Slave read data
*n = 32 (64 for eDMA_A) channels
eDMA interrupt request eDMA peripheral request
eDMA done handshake
Figure 21-25. eDMA Operation, Part 1
In the second part of the basic data flow as shown in Figure 21-26, the modules associated with the data
transfer (address path, data path, and control) sequence through the required source reads and destination
writes to perform the actual data movement. The source reads are initiated and the fetched data is
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PXR40 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor