PXR40RM Datasheet, PDF (922/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

Deserial Serial Peripheral Interface (DSPI)
SoC Power
Management
Block
system clock
enable_clk
doze
stop_ack
stop
clk
&
addr,
byte_en,
rwb,
wdata
&
&
&
&
Frame Boundary
Detection
Logic
Non-Memory Mapped Area
&
DOZE
MDIS
Memory Mapped Area
DSPI
module_en
DQ
&
clk_s
Figure 25-41. Example of a DSPI in a device with a Power Management Block
25.4.11.1 Stop Mode (External Stop Mode)
The DSPI supports the Stop Mode protocol. When a request is made to enter External Stop Mode, the DSPI
block acknowledges the request by negating ipg_stop_ack. When the DSPI is ready to have its clocks shut
off the ipg_stop_ack signal is asserted. If a serial transfer is in progress, the DSPI waits until it reaches the
frame boundary before it asserts ipg_stop_ack. While the clocks are shut off, the DSPI memory-mapped
logic is not accessible. The states of the interrupt and DMA request signals cannot be changed while in
External Stop Mode.
25.4.11.2 Module Disable Mode
Module Disable Mode is a block-specific mode that the DSPI can enter to save power. Host software can
initiate the Module Disable Mode by writing a ‘1’ to the MDIS bit in the DSPI_MCR. The Module Disable
Mode can also be initiated by hardware. A power management block can initiate Module Disable Mode
by asserting the ipg_doze signal while the DOZE bit in the DSPI_MCR is asserted.
When the MDIS bit is asserted or the ipg_doze signal is asserted while the DOZE bit is asserted, the DSPI
negates ipg_enable_clk at the next frame boundary. If implemented, the ipg_enable_clk signal can stop
the clock to the non-memory mapped logic. When ipg_enable_clk is negated, the DSPI is in a dormant
state, but the memory mapped registers are still accessible. Certain read or write operations have a different
affect when the DSPI is in the Module Disable Mode. Reading the RX FIFO Pop Register will not change
the state of the RX FIFO. Likewise, writing to the TX FIFO Push Register will not change the state of the
25-62
PXR40 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor