PXR40RM Datasheet, PDF (935/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

Offset
0x000C
0x0010
0x0014
0x0018
0x001C
Enhanced Serial Communication Interface (eSCI)
Table 26-3. eSCI 32-bit Memory Map (continued)
LIN Control Register 1 (eSCI_LCR1)
Register
LIN Control Register 2 (eSCI_LCR2)
LIN Transmit Register
(eSCI_LTR)
LIN Receive Register
(eSCI_LRR)
LIN CRC Polynomial Register (eSCI_LPR)
Reserved
Reserved
Control Register 3 (eSCI_CR3)
Reserved
Table 26-4 provides a key for register figures and tables.
Table 26-4. Register Conventions
Convention
Description
Depending on its placement in the read or write row, indicates that the bit is not readable or not writeable.
FIELDNAME Identifies the field. Its presence in the read or write row indicates that it can be read or written.
Register Field Types
rwm
A read/write bit that may be modified by a eSCI module in some fashion other than by a reset.
w1c
Write one to clear. A flag bit that can be read, is cleared by writing a one, writing 0 has no effect.
Reset Values
0
Resets to zero.
1
Resets to one.
26.3.2 Register Descriptions
This section consists of register descriptions in address order. Each description includes a standard register
diagram with an associated figure number. Writes to a reserved register location do not have any effect and
reads of these locations return a zero. Details of register bit and field function follow the register diagrams,
in bit order.
Freescale Semiconductor
PXR40 Microcontroller Reference Manual, Rev. 1
26-7