PXR40RM Datasheet, PDF (390/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

Core (e200z7) Overview
SUPERVISOR Mode Programmer’s Model SPRs and GPRs
General Registers
Exception Handling/Control Registers
SPR General
Save and Restore
Interrupt Vector Prefix
Condition Register
CR
Count Register
CTR SPR 9
Link Register
LR
SPR 8
General-Purpose
Registers
GPR0
GPR1
GPR31
XER
XER
SPR 1 _Accumulator
ACC
Processor Control Registers
Machine State
MSR
Processor Version
PVR _{SPR 287}
Processor ID
PIR
SPR 286
Hardware Implementation
Dependent¹
HID0 SPR 1008
HID1 SPR 1009
System Version¹
SVR SPR 1023
Debug Registers²
SPRG0
SPRG1
SPRG2
SPRG3
SPRG4
SPRG5
SPRG6
SPRG7
SPRG8
SPRG9
User SPR
USPRG0
SPR 272
SPR 273
SPR 274
SPR 275
SPR 276
SPR 277
SPR 278
SPR 279
SPR 604
SPR 605
SPR 256
SRR0
SRR1
CSRR0
CSRR1
DSRR0¹
DSRR1¹
MCSRR0¹
MCSRR1¹
SPR 26
IVPR SPR 63
SPR 27 _{Interrupt Vector Offset}
SPR 58
SPR 59
SPR 574
IVOR0
IVOR1
SPR 400
SPR 401
SPR 575
SPR 570
SPR 571
IVOR15
IVOR32¹
SPR 415
SPR 528
Exception Syndrome
IVOR35¹ SPR 531
ESR
SPR 62
Machine Check
Syndrome Register
Machine Check
Address Register
MCSR SPR 572 MCAR SPR 573
Data Exception Address
Timers
DEAR
Time Base (writeonly)
Decrementer
TBL
SPR 284
DEC
SPR 61 _{BTB Register}
SPR 22
BTB Control¹
BUCSR SPR 1013
TBU
SPR 285
DECAR SPR 54
Debug Control
DBCR0 SPR 308
DBCR1 SPR 309
Instruction Address
Compare
IAC1
SPR 312
IAC2
SPR 313
Control and Status
TCR SPR 340
TSR
SPR 336
SPE/EFPU Registers
SPE /EFPU APU
Status and
Control Register
DBCR2
DBCR3¹
DBCR4¹
DBCR5¹
DBCR6¹
DBERC0¹
DEVENT¹
DDAM¹
SPR 310
SPR 561
SPR 563
SPR 564
SPR 603
SPR 569
SPR 975
SPR 576
Debug Status
IAC3
SPR 314
IAC4
SPR 315
IAC5
SPR 565
IAC6
SPR 566
IAC7
SPR 567
IAC8
SPR 568
Data Address Compare
DAC1
SPR 316
DAC2
SPR 317
SPEFSCR SPR 512
MMU Assist¹
MAS0
MAS1
MAS2
MAS3
MAS4
Memory Management Registers
Process ID
Control & Configuration
SPR 624
SPR 625
SPR 626
SPR 627
SPR 628
PID0
SPR 48 MMUCSR0 SPR 1012
MMUCFG SPR 1015
TLB0CFG SPR 688
TLB1CFG SPR 689
Cache Registers
DBSR SPR 304
Data Value Compare
Debug Counter¹
DBCNT SPR 562
DVC1
DVC2
SPR 318
SPR 319
1 - These PXR40-specific registers may not be supported
by other PowerPC processors
2 - Optional registers defined by the PowerPC Book-E
architecture
3 - Read-only registers
MAS6
SPR 630
Cache Configuration
(Read-only)
L1CFG0
L1CFG1
SPR 515
SPR 516
Cache Control¹
L1CSR0 SPR 1010
L1CSR1 SPR 1011
L1FINV0 SPR 1016
L1FINV1 SPR 959
13-2
PXR40 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor