PXR40RM Datasheet, PDF (828/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

FlexCAN Module
24.3.4.2 Control Register (FLEXCAN_x_CTRL)
This register is defined for specific FlexCAN control features related to the CAN bus, such as bit-rate,
programmable sampling point within an Rx bit, Loop Back Mode, Listen Only Mode, Bus Off recovery
behavior and interrupt enabling (Bus-Off, Error, Warning). It also determines the Division Factor for the
clock prescaler. Most of the fields in this register should only be changed while the module is in Disable
Mode or in Freeze Mode. Exceptions are the BOFF_MSK, ERR_MSK, TWRN_MSK, RWRN_MSK and
BOFF_REC bits, that can be accessed at any time.
Base + 0x0004
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R
W
PRESDIV
RJW
PSEG1
PSEG2
RE-
SET:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
16 17 18 19 20 21 22
R
W
BOFF ERR_ CLK_
_MSK MSK SRC
LPB
TWR RWR
N_MS N_MS
K
K
0
RE-
SET:
0
0
0
0
0
0
0
23 24 25 26 27 28 29 30 31
0
SMP
BOFF
_REC
TSYN LBUF
LOM
PROPSEG
000000000
= Unimplemented or Reserved
Figure 24-6. Control Register (FLEXCAN_x_CTRL)
Table 24-10. FLEXCAN_x_CTRL Field Descriptions
Field
Description
0–7 Prescaler Division Factor
PRESDIV This 8-bit field defines the ratio between the CPI clock frequency and the Serial Clock (Sclock) frequency. The
Sclock period defines the time quantum of the CAN protocol. For the reset value, the Sclock frequency is equal to
the CPI clock frequency. The Maximum value of this register is 0xFF, that gives a minimum Sclock frequency equal
to the CPI clock frequency divided by 256. For more information refer to Section 24.4.8.4, Protocol Timing.
Sclock frequency = CPI clock frequency / (PRESDIV + 1)
8–9
RJW
Resync Jump Width
This 2-bit field defines the maximum number of time quanta¹ that a bit time can be changed by one
re-synchronization. The valid programmable values are 0–3.
Resync Jump Width = RJW + 1.
10–12 Phase Segment 1
PSEG1 This 3-bit field defines the length of Phase Buffer Segment 1 in the bit time. The valid programmable values are 0–7.
Phase Buffer Segment 1 = (PSEG1 + 1) x Time-Quanta.
13–15 Phase Segment 2
PSEG2 This 3-bit field defines the length of Phase Buffer Segment 2 in the bit time. The valid programmable values are 1–7.
Phase Buffer Segment 2 = (PSEG2 + 1) x Time-Quanta.
16 Bus Off Mask
BOFF_MS This bit provides a mask for the Bus Off Interrupt.
K
0 Bus Off interrupt disabled
1 Bus Off interrupt enabled
24-18
PXR40 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor