PXR40RM Datasheet, PDF (701/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

FlexRay Communication Controller (FLEXRAY)
Module Transitions
The module transitions that can be triggered by the controller are described in Table 22-110. The
transitions C1 and C2 apply to both sides of the message buffer and are applied at the same time. All other
controller transitions apply to the transmit side only.
Table 22-110. Double Transmit Message Buffer Module Transitions
Transition
Condition
Description
common transitions
IS
Internal Message Transfer Start - Start transfer of message data from commit
see Section 22.6.6.4.5, side to transmit side.
IE
Internal Message
Internal Message Transfer End - Stop transfer of message data from commit
Transfer
side to transmit side.
Note: The internal message transfer is stopped before the slot or segment start.
transmit side specific transitions
SA
slot match and
Slot Assigned - Message buffer is assigned to next static slot.
static slot
MA
slot match and
Message Available - Message buffer is assigned to next slot and cycle counter
CycleCounter match filter matches.
TX
slot start and
Transmission Slot Start - Slot Start and commit bit CMT is set.
MBCCSR(2n+1)[CMT]=1 In case of a dynamic slot, pLatestTx is not exceeded.
SU
status updated
Status Updated - Slot Status field and message buffer status flags updated.
Interrupt flag set.
STS
static slot start
Static Slot Start - Start of static slot.
DSS
SSS
dynamic slot start or
symbol window start or
NIT start
slot start or
symbol window start or
NIT start
Dynamic Slot or Segment Start. - Start of dynamic slot or symbol window or
NIT.
Slot or Segment Start - Start of static slot or dynamic slot or symbol window or
NIT.
Transition Priorities
The application can trigger only one transition at a time. There is no need to specify priorities among them.
As shown in the first part of Table 22-111, the module transitions have a higher priority than the
application transitions. The priorities among the controller transitions and the related states are given in
the second part of Table 22-111. These priorities apply only to the transmit side. The internal message
transmit start transition IS has tho lowest priority.
Table 22-111. Double Transmit Message Buffer Transition Priorities
State
Idle
Idle
CCMa
Priority
IS > HD
IS > HL
MA > SA
TX > STS
TX > DSS
Description
module vs. application
Internal Message Transfer Start > Message Buffer Disable
Internal Message Transfer Start > Message Buffer Lock
module internal
Message Available > Slot Assigned
Transmission Slot Start > Static Slot Start
Transmission Slot Start > Dynamic Slot Start
Freescale Semiconductor
PXR40 Microcontroller Reference Manual, Rev. 1
22-117