PXR40RM Datasheet, PDF (1356/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

Nexus Development Interface (NDI)
3. If the periodic OTM message counter expires (after 255 queued messages without an OTM), an
OTM is sent using the latched data from the previous OTM or process ID register write.
31.13 Program Trace
This section details the program trace mechanism supported by NZ7C3 for the PXR40 processor. Program
trace is implemented via branch trace messaging (BTM) as per the Class 3 IEEE-ISTO 5001-2011 standard
definition. Branch trace messaging for e200z7 processors is accomplished by snooping the e200z7 virtual
address bus (between the CPU and MMU), attribute signals, and CPU status.
31.13.1 Branch Trace Messaging (BTM)
Traditional branch trace messaging facilitates program trace by providing the following types of
information:
• Messages generated for direct branches that were taken indicate the number of sequential
instructions executed since the last branch or exception. Branches not taken (direct or indirect) are
not counted as sequential instructions.
• Messages generated for indirect branches and exceptions that were taken indicate:
— Number of sequential instructions executed since the last branch that was taken
— Exception with the unique portion of the branch target address or exception vector address
• History field in the branch and predicate instructions that can generate the following messages for
program trace:
— Number of sequential instructions executed since the last indirect branch was taken, as well as
the unique portion of the indirect branch address
— Number of sequential instructions executed since the last exception was processed, as well as
the unique portion of the exception vector address
— Number of sequential instructions executed since the last predicate instruction was taken
— History field in the branch and predicate instruction unique to the branch target address or
exception vector address. Each bit in the history field represents a direct branch or predicated
instruction where a value of one (1) indicates taken, and a value of zero (0) indicates not taken.
Certain instructions (evsel) generate a pair of predicate bits which are both reported as
consecutive bits in the history field.
31.13.1.1 e200z7 Indirect Branch Message Instructions
(Power Architecture Book E)
Table 31-24 shows the types of instructions and events which cause indirect branch messages or branch
history messages to be encoded.
Table 31-24. Indirect Branch Message Sources
Source of Indirect Branch Message
Taken branch relative to a register value
Instructions
bcctr, bcctrl, bclr, bclrl
31-40
PXR40 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor