PXR40RM Datasheet, PDF (1264/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

External Bus Interface (EBI)
30.1.3 Signal Naming
Generic signal names like ADDR and DATA have been replaced with signal names according to the table
below. Refer to the Signals chapter for the full signal names and muxing information (Table 30-1 lists the
function partial-signal name).
Table 30-1. Device-Specific Signal Naming
Generic Signal Name
Equivalent Chip-level
Signal Name¹
I/O Type
Function
ADDR
D_ADD[9:30]
I/O
Address bus
BDIP
CLKOUT
D_BDIP
D_CLKOUT²
Output
Output
Burst Data in Progress
Clockout
CS
CAL_CS
DATA
D_CS[0:3]³
D_ADD_DAT[0:15]
(through muxing
D_ADD_DAT[16:31] are
available)
—
Output
I/O
—
Calibration Chip Selects
Data bus⁴
OE
D_OE
Output Output Enable
RD_WR
D_RD_WR
I/O
Read_Write
TA
D_TA
I/O
Transfer Acknowledge
TEA
D_TEA
I/O
Transfer Error Acknowledge
TS
D_TS
I/O
Transfer Start
WE/BE
D_WE[0:3]
Output Write/Byte Enables
ALE
D_ALE
Output Address Latch Enable
1 _{This pin function may not be the pins primary function, Refer to the Signals chapter for muxing information.}
2 _{The D_CLKOUT signal is driven by the System Clock Block outside the EBI.}
3 _{Most of this chapter refers to CS pins (especially diagrams), but the behavior is identical for the CAL_CS pins (described}
in Section 30.4.2.10, Calibration Bus Operation). Only CAL_CS (D_CS at chip-level) is implemented on this device.
4 _{In Address/Data multiplexing modes, Data will also show the address during the address phase.}
30.1.4 Modes of Operation
The mode of the EBI is determined by the MDIS, EXTM, and AD_MUX bits in the EBI_MCR. See
Section 30.3.1.1, EBI Module Configuration Register (EBI_MCR) for details. Slower-speed modes,
Debug Mode, Stop Mode, and Factory Test Mode are modes that the MCU may enter, in parallel to the
EBI being configured in one of its block-specific modes.
30.1.4.1 Single Master Mode
In Single Master Mode, the EBI responds to internal requests matching one of its regions, but ignores all
externally-initiated bus requests. The MCU is the only master allowed to initiate transactions on the
external bus in this mode; therefore, it acts as a parked master and does not have to arbitrate for the bus
before starting each cycle. The BR, BG and BB signals are not used by the EBI in this mode, and are
30-2
PXR40 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor