PXR40RM Datasheet, PDF (695/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

FlexRay Communication Controller (FLEXRAY)
2. the message buffer data field size, as defined by the related field of the Message Buffer Data Size
Register (MBDSR)
3. the number of bytes received over the FlexRay bus
If the message buffer is assigned to the message buffer segment 1, and the number of received bytes is
greater than 2*MBDSR.MBSEG1DS, the controller writes only 2*MBDSR.MBSEG1DS bytes into the
message buffer data field of the receive shadow buffer. If the number of received bytes is less than
2*MBDSR.MBSEG1DS, the controller writes only the received number of bytes and will not change the
trailing bytes in the message buffer data field of the receive shadow buffer. The same holds for the message
buffer segment 2 with MBDSR.MBSEG2DS.
22.6.6.3.4 Received Message Access
To access the message data received over the FlexRay bus, the application reads the message data stored
in the message buffer data field of the corresponding receive message buffer. The access to the message
buffer data field is described in Section 22.6.3.1, Individual Message Buffers.
The application can read the message buffer data field if the receive message buffer is one of the states
HDis, HDisLck, or HLck. If the message buffer is in one of these states, the controller will not change the
content of the message buffer.
22.6.6.3.5 Receive Shadow Buffers Concept
The receive shadow buffer concept applies only to individual receive message buffers. The intention of
this concept is to ensure that only syntactically and semantically valid received non-null frames are
presented to the application in a receive message buffer. The basic structure of a receive shadow buffer is
described in Section 22.6.3.2, Receive Shadow Buffers.
The receive shadow buffers temporarily store the received frame header and message data. After the slot
boundary the slot status information is generated. If the slot status information indicates the reception of
the valid non-null frame (see Table 22-105), the controller writes the slot status into the slot status field of
the receive shadow buffer and exchanges the content of the Message Buffer Index Registers (MBIDXRn)
with the content of the corresponding internal shadow buffer index register. In all other cases, the
controller writes the slot status into the identified receive message buffer, depending on the slot status and
the FlexRay segment the message buffer is assigned to.
The shadow buffer concept, with its index exchange, results in the fact that the flexray memory located
message buffer associated to an individual receive message buffer changes after successful reception of a
valid frame. This means that the message buffer area in the flexray memory accessed by the application
for reading the received message is different from the initial setting of the message buffer. Therefore, the
application must not rely on the index information written initially into the Message Buffer Index Registers
(MBIDXRn). Instead, the index of the message buffer header field must be fetched from the Message
Buffer Index Registers (MBIDXRn).
22.6.6.4 Double Transmit Message Buffer
The section provides a detailed description of the functionality of the double transmit message buffers.
Freescale Semiconductor
PXR40 Microcontroller Reference Manual, Rev. 1
22-111