PXR40RM Datasheet, PDF (1219/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

Enhanced Time Processing Unit (eTPU2)
• Writes: the most significant byte of the parameters is not written, and the SDM retains the old byte
value, regardless of the Host access size.
• Reads: the most significant bit of the 24-bit parameter (that is, the msbit of the second most
significant 32-bit parameter byte) is repeated in the 8 most significant bits of the read value on all
32-bit reads and most significant 16- and 8-bit reads.
The same parameters written in the standard SDM address space are read from the PSE area with the same
offsets, and vice-versa.
This feature reliefs the Host from extending the signal of 24-bit eTPU parameters before calculations, and
from read-modify-write accesses to modify 24-bit parameters at the SDM.
29.3.2.4 SDM Organization
The SDM internal partition for channel allocation is dynamic and programmed in the Channel Registers
(see Section 29.2.10.2, ETPUCxSCR - eTPU Channel x Status Control Register).
The Host application is responsible for allocating a different parameter base address to each channel during
the initial eTPU configuration, and to allocate enough parameters for the selected Function, with no
unintentional overlapping between parameters of different functions.
Besides channel parameters, global areas may have to be allocated for parameters that are shared by more
than one channel, in one or both Engines. Also, temporary parameter areas should be reserved to be used
by the coherent parameter transfer mechanisms described in Section 29.3.4, Parameter Sharing and
Coherency, if necessary.
Freescale Semiconductor
PXR40 Microcontroller Reference Manual, Rev. 1
29-51