PXR40RM Datasheet, PDF (437/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

AMBA Crossbar Switch (XBAR)
Address:
Base + 0x0000 (XBAR_MPR0)
Base + 0x0100 (XBAR_MPR1)
Base + 0x0200 (XBAR_MPR2)
Base + 0x0600 (XBAR_MPR6)
Base + 0x0700 (XBAR_MPR7)
Access: Supervisor R/W
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R0
1
0
1
0
0
0
MSTR6
MSTR5
MSTR4
W0
1
0
1
0
0
0
Reset 0
1
0
1
0
1
0
0
0
0
1
1
0
0
1
0
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
R0
0
0
0
0
0
0
0
0
0
MSTR1
MSTR0
W0
0
0
0
0
0
0
0
0
0
Reset 0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
Figure 14-2. Master Priority Registers (XBAR_MPRn)
Table 14-3. XBAR_MPRn Descriptions
Field
0–3
4
5–7
MSTR6
Description
Reserved, must be set to 0b0101. Undefined operation if not.
Reserved, must be cleared.
Master 6 priority. Set the arbitration priority for master port 6 on the associated slave port.
000 Master 6 has the highest priority when accessing slave port n.
8
9–11
MSTR5
101 Master 6 has the lowest priority when accessing slave port n.
110–111 Invalid values
Reserved, must be cleared.
Master 5 priority. Set the arbitration priority for master port 5 on the associated slave port.
000 Master 5 has the highest priority when accessing slave port n.
12
13–15
MSTR4
101 Master 5 has the lowest priority when accessing slave port n.
110–111 Invalid values
Reserved, must be cleared.
Master 4 priority. Set the arbitration priority for master port 4 on the associated slave port.
000 Master 4 has the highest priority when accessing slave port n.
16-24
101 Master 4 has the lowest priority when accessing slave port n.
110–111 Invalid values
Reserved, must be cleared.
Freescale Semiconductor
PXR40 Microcontroller Reference Manual, Rev. 1
14-5