PXR40RM Datasheet, PDF (983/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

Chapter 27
Enhanced Queued Analog-to-Digital Converter (EQADC)
27.1 Overview
The Enhanced Queued Analog-to-Digital Converter (EQADC) module provides fast and accurate
conversions for a wide range of applications. There are two EQADC modules on the PXR40, EQADC_A
and EQADC_B. Each EQADC module provides a parallel interface to two on-chip, independent
analog-to-digital converter cores. EQADC_B has a hardware interface to the eight decimation filter blocks
on the PXR40. This allows transferring of conversion and filtered values to and from the EQADC and
decimation filters without CPU or DMA interaction. Each EQADC module has 24 dedicated external
analog input pins, and 16 pins are shared by each module.
The EQADC transfers commands from multiple Command FIFOs (CFIFOs) to the on-chip ADCs. The
multiple Result FIFOs (RFIFOs) can receive data from the on-chip ADCs or from an on-chip DSP module
(decimation filters). Data from the on-chip ADCs can be routed to the side interface, processed by the
decimation filters and then routed back through the side interface to the RFIFOs. The EQADC supports
software and external hardware triggers (via package pins) from other blocks (eTPU and eMIOS) to
initiate transfers of commands from the CFIFOs to the on-chip ADCs. It also monitors the fill level of the
CFIFOs and RFIFOs, and accordingly generates DMA or interrupt requests to control data movement
between the FIFOs and the system memory.
Freescale Semiconductor
PXR40 Microcontroller Reference Manual, Rev. 1
27-1