PXR40RM Datasheet, PDF (1006/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

Enhanced Queued Analog-to-Digital Converter (EQADC)
Table 27-11. EQADC_IDCR Field Description (continued)
Field
Description
3
19
EOQIEx
4
20
CFUIEx
End of Queue Interrupt Enable x. EOQIEx enables the EQADC to generate an interrupt request when the
corresponding EQADC_FISR[EOQFx] is asserted.
0 Disable End of Queue interrupt request.
1 Enable End of Queue interrupt request.
CFIFO Underflow Interrupt Enable x. CFUIEx enables the EQADC to generate an interrupt request when the
corresponding EQADC_FISR[CFUFx] is asserted.
Apart from generating an independent interrupt request for a CFIFOx underflow event, the EQADC also provides
a combined interrupt at which the Result FIFO Overflow Interrupt, the Command FIFO Underflow Interrupt, and
the Command FIFO Trigger Overrun Interrupt requests of all CFIFOs are ORed. When RFOIEx, CFUIEx, and
TORIEx are all asserted, this combined interrupt request is asserted whenever one of the following 18 flags
becomes asserted: RFOFx, CFUFx, and TORFx (assuming that all interrupts are enabled). See Section 27.7.8,
EQADC DMA/Interrupt Request, for details.
5
21
6
22
CFFEx
0 Disable Underflow Interrupt request.
1 Enable Underflow Interrupt request.
Reserved
CFIFO Fill Enable x. CFFEx enables the EQADC to generate an interrupt request (CFFSx is asserted) or DMA
request (CFFSx is negated) when EQADC_FISR[CFFFx] is asserted.
0 Disable CFIFO Fill DMA or Interrupt request.
1 Enable CFIFO Fill DMA or Interrupt request.
7
23
CFFSx
Note: CFFEx must not be negated while a DMA transaction is in progress.
CFIFO Fill Select x. CFFSx selects if a DMA or interrupt request is generated when EQADC_FISR[CFFFx] is
asserted. If CFFEx is asserted, the EQADC generates an interrupt request when CFFSx is negated, or it
generates a DMA request if CFFSx is asserted.
0 Generate interrupt request to move data from the system memory to CFIFOx.
1 Generate DMA request to move data from the system memory to CFIFOx.
8–11
24–27
12
28
RFOIEx
13
29
Note: CFFSx must not be negated while a DMA transaction is in progress.
Reserved
RFIFO Overflow Interrupt Enable x. RFOIEx enables the EQADC to generate an interrupt request when the
corresponding EQADC_FISR[RFOFx] is asserted.
Apart from generating an independent interrupt request for an RFIFOx overflow event, the EQADC also provides
a combined interrupt at which the Result FIFO Overflow Interrupt, the Command FIFO Underflow Interrupt, and
the Command FIFO Trigger Overrun Interrupt requests of ALL CFIFOs are ORed. When RFOIEx, CFUIEx, and
TORIEx are all asserted, this combined interrupt request is asserted whenever one of the following 18 flags
becomes asserted: RFOFx, CFUFx, and TORFx (assuming that all interrupts are enabled). See Section 27.7.8,
EQADC DMA/Interrupt Request, for details.
0 Disable Overflow Interrupt request.
1 Enable Overflow Interrupt request.
Reserved
27-24
PXR40 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor