PXR40RM Datasheet, PDF (1324/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

Nexus Development Interface (NDI)
Table 31-2. Nexus Development Interface (NDI) Registers (continued)
Index
4
5
7
9
10
11
13
14
15
16
17
18
19
20
21
48
50
51
53
54
55
56
2
11
13
14
15
18
19
22
23
30
Register
e200z7 Development Control3 (NZ7C3_DC3)
e200z7 Development Control4 (NZ7C3_DC4)
Read/Write Access Control/Status (NZ7C3_RWCS)
Read/Write Access Address (NZ7C3_RWA)
Read/Write Access Data (NZ7C3_RWD)
e200z7 Watchpoint Trigger (NZ7C3_WT)
e200z7 Data Trace Control (NZ7C3_DTC)
e200z7 Data Trace Start Address 1 (NZ7C3_DTSA1)
e200z7 Data Trace Start Address 2 (NZ7C3_DTSA2)
e200z7 Data Trace Start Address 3 (NZ7C3_DTSA3)
e200z7 Data Trace Start Address 4 (NZ7C3_DTSA4)
e200z7 Data Trace End Address 1 (NZ7C3_DTEA1)
e200z7 Data Trace End Address 2 (NZ7C3_DTEA2)
e200z7 Data Trace End Address 3 (NZ7C3_DTEA3)
e200z7 Data Trace End Address 4 (NZ7C3_DTEA4)
Development Status (DS)
Overrun Control (OVCR)
Watchpoint Mask (WMSK)
Program Trace Start Trigger Control (PTSTC)
Program Trace End Trigger Control (PTETC)
Data Trace Start Trigger Control (DTSTC)
Data Trace End Trigger Control (DTETC)
eDMA_A/B Control and Status Registers
eDMA_x Development Control (NXDM_DC)
eDMA_x Watchpoint Trigger (NXDM_WT)
eDMA_x Data Trace Control (NXDM_DTC)
eDMA_x Data Trace Start Address 0 (NXDM_DTSA1)
eDMA_x Data Trace Start Address 1 (NXDM_DTSA2)
eDMA_x Data Trace End Address 0 (NXDM_DTEA1)
eDMA_x Data Trace End Address 1 (NXDM_DTEA2)
eDMA_x Breakpoint and Watchpoint Control 1 (NXDM_BWC1)
eDMA_x Breakpoint and Watchpoint Control 2 (NXDM_BWC2)
eDMA_x Breakpoint and Watchpoint Address 1 (NXDM_BWA1)
31-8
PXR40 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor